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| author | Ard Biesheuvel <ard.biesheuvel@linaro.org> | 2018-11-22 09:46:46 +0100 |
|---|---|---|
| committer | Will Deacon <will.deacon@arm.com> | 2018-11-27 19:00:45 +0000 |
| commit | bdb85cd1d20669dfae813555dddb745ad09323ba (patch) | |
| tree | af519f4e76f6d913d7ed665a12c4cdc51512edb6 /arch/arm64/kernel/ftrace.c | |
| parent | 7aaf7b2fd26c3a069472dd9778367b2f941dd866 (diff) | |
| download | lwn-bdb85cd1d20669dfae813555dddb745ad09323ba.tar.gz lwn-bdb85cd1d20669dfae813555dddb745ad09323ba.zip | |
arm64/module: switch to ADRP/ADD sequences for PLT entries
Now that we have switched to the small code model entirely, and
reduced the extended KASLR range to 4 GB, we can be sure that the
targets of relative branches that are out of range are in range
for a ADRP/ADD pair, which is one instruction shorter than our
current MOVN/MOVK/MOVK sequence, and is more idiomatic and so it
is more likely to be implemented efficiently by micro-architectures.
So switch over the ordinary PLT code and the special handling of
the Cortex-A53 ADRP errata, as well as the ftrace trampline
handling.
Reviewed-by: Torsten Duwe <duwe@lst.de>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
[will: Added a couple of comments in the plt equality check]
Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'arch/arm64/kernel/ftrace.c')
| -rw-r--r-- | arch/arm64/kernel/ftrace.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm64/kernel/ftrace.c b/arch/arm64/kernel/ftrace.c index 50986e388d2b..2135665a8ab3 100644 --- a/arch/arm64/kernel/ftrace.c +++ b/arch/arm64/kernel/ftrace.c @@ -104,7 +104,7 @@ int ftrace_make_call(struct dyn_ftrace *rec, unsigned long addr) * is added in the future, but for now, the pr_err() below * deals with a theoretical issue only. */ - trampoline = get_plt_entry(addr); + trampoline = get_plt_entry(addr, mod->arch.ftrace_trampoline); if (!plt_entries_equal(mod->arch.ftrace_trampoline, &trampoline)) { if (!plt_entries_equal(mod->arch.ftrace_trampoline, |