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authorWill Deacon <will.deacon@arm.com>2017-03-10 20:32:22 +0000
committerCatalin Marinas <catalin.marinas@arm.com>2017-03-20 16:16:57 +0000
commit155433cb365ee4666bdf7c3c7bc2978b17be36a4 (patch)
tree43668ce6b2cfffb1327fe5c1054ddc228a108f1a /arch/arm64/kernel/cpuinfo.c
parenta8d4636f96ad075dc6d6af182b3de0b5498dc301 (diff)
downloadlwn-155433cb365ee4666bdf7c3c7bc2978b17be36a4.tar.gz
lwn-155433cb365ee4666bdf7c3c7bc2978b17be36a4.zip
arm64: cache: Remove support for ASID-tagged VIVT I-caches
As a recent change to ARMv8, ASID-tagged VIVT I-caches are removed retrospectively from the architecture. Consequently, we don't need to support them in Linux either. Acked-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'arch/arm64/kernel/cpuinfo.c')
-rw-r--r--arch/arm64/kernel/cpuinfo.c9
1 files changed, 3 insertions, 6 deletions
diff --git a/arch/arm64/kernel/cpuinfo.c b/arch/arm64/kernel/cpuinfo.c
index 155ddd8ad56a..efe74ecc9738 100644
--- a/arch/arm64/kernel/cpuinfo.c
+++ b/arch/arm64/kernel/cpuinfo.c
@@ -43,10 +43,9 @@ DEFINE_PER_CPU(struct cpuinfo_arm64, cpu_data);
static struct cpuinfo_arm64 boot_cpu_data;
static char *icache_policy_str[] = {
- [ICACHE_POLICY_RESERVED] = "RESERVED/UNKNOWN",
- [ICACHE_POLICY_AIVIVT] = "AIVIVT",
- [ICACHE_POLICY_VIPT] = "VIPT",
- [ICACHE_POLICY_PIPT] = "PIPT",
+ [0 ... ICACHE_POLICY_PIPT] = "RESERVED/UNKNOWN",
+ [ICACHE_POLICY_VIPT] = "VIPT",
+ [ICACHE_POLICY_PIPT] = "PIPT",
};
unsigned long __icache_flags;
@@ -293,8 +292,6 @@ static void cpuinfo_detect_icache_policy(struct cpuinfo_arm64 *info)
case ICACHE_POLICY_PIPT:
break;
default:
- case ICACHE_POLICY_AIVIVT:
- set_bit(ICACHEF_AIVIVT, &__icache_flags);
/* Fallthrough */
case ICACHE_POLICY_VIPT:
/* Assume aliasing */