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| author | Marc Zyngier <marc.zyngier@arm.com> | 2018-05-29 13:11:07 +0100 |
|---|---|---|
| committer | Catalin Marinas <catalin.marinas@arm.com> | 2018-05-31 17:34:27 +0100 |
| commit | 5cf9ce6e5ea50f805c6188c04ed0daaec7b6887d (patch) | |
| tree | 5b34b5684ecaba4d9951e59a37cfb086629d6da7 /arch/arm64/kernel/cpu_errata.c | |
| parent | 8e2906245f1e3b0d027169d9f2e55ce0548cb96e (diff) | |
| download | lwn-5cf9ce6e5ea50f805c6188c04ed0daaec7b6887d.tar.gz lwn-5cf9ce6e5ea50f805c6188c04ed0daaec7b6887d.zip | |
arm64: Add per-cpu infrastructure to call ARCH_WORKAROUND_2
In a heterogeneous system, we can end up with both affected and
unaffected CPUs. Let's check their status before calling into the
firmware.
Reviewed-by: Julien Grall <julien.grall@arm.com>
Reviewed-by: Mark Rutland <mark.rutland@arm.com>
Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'arch/arm64/kernel/cpu_errata.c')
| -rw-r--r-- | arch/arm64/kernel/cpu_errata.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm64/kernel/cpu_errata.c b/arch/arm64/kernel/cpu_errata.c index c1eda6be7758..cd91ca0250f1 100644 --- a/arch/arm64/kernel/cpu_errata.c +++ b/arch/arm64/kernel/cpu_errata.c @@ -233,6 +233,8 @@ enable_smccc_arch_workaround_1(const struct arm64_cpu_capabilities *entry) #endif /* CONFIG_HARDEN_BRANCH_PREDICTOR */ #ifdef CONFIG_ARM64_SSBD +DEFINE_PER_CPU_READ_MOSTLY(u64, arm64_ssbd_callback_required); + void __init arm64_update_smccc_conduit(struct alt_instr *alt, __le32 *origptr, __le32 *updptr, int nr_inst) |