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| author | Zhou Wang <wangzhou1@hisilicon.com> | 2020-09-28 16:32:02 +0800 |
|---|---|---|
| committer | Will Deacon <will@kernel.org> | 2020-09-28 22:57:43 +0100 |
| commit | a76a37777f2c936b1f046bfc0c5982c958b16bfe (patch) | |
| tree | a6bf4316bf3b98330fc565fd4913d7ac076acf87 /arch/arm64/include/asm/io.h | |
| parent | 1226fa0e541c89af22683676b9829fce849efe31 (diff) | |
| download | lwn-a76a37777f2c936b1f046bfc0c5982c958b16bfe.tar.gz lwn-a76a37777f2c936b1f046bfc0c5982c958b16bfe.zip | |
iommu/arm-smmu-v3: Ensure queue is read after updating prod pointer
Reading the 'prod' MMIO register in order to determine whether or not
there is valid data beyond 'cons' for a given queue does not provide
sufficient dependency ordering, as the resulting access is address
dependent only on 'cons' and can therefore be speculated ahead of time,
potentially allowing stale data to be read by the CPU.
Use readl() instead of readl_relaxed() when updating the shadow copy of
the 'prod' pointer, so that all speculated memory reads from the
corresponding queue can occur only from valid slots.
Signed-off-by: Zhou Wang <wangzhou1@hisilicon.com>
Link: https://lore.kernel.org/r/1601281922-117296-1-git-send-email-wangzhou1@hisilicon.com
[will: Use readl() instead of explicit barrier. Update 'cons' side to match.]
Signed-off-by: Will Deacon <will@kernel.org>
Diffstat (limited to 'arch/arm64/include/asm/io.h')
| -rw-r--r-- | arch/arm64/include/asm/io.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm64/include/asm/io.h b/arch/arm64/include/asm/io.h index ff50dd731852..fd172c41df90 100644 --- a/arch/arm64/include/asm/io.h +++ b/arch/arm64/include/asm/io.h @@ -110,6 +110,7 @@ static inline u64 __raw_readq(const volatile void __iomem *addr) #define __io_par(v) __iormb(v) #define __iowmb() dma_wmb() +#define __iomb() dma_mb() /* * Relaxed I/O memory access primitives. These follow the Device memory |