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| author | Catalin Marinas <catalin.marinas@arm.com> | 2021-05-26 20:36:21 +0100 |
|---|---|---|
| committer | Will Deacon <will@kernel.org> | 2021-05-26 22:05:07 +0100 |
| commit | 21047e91a5a674b97ebbf2c2c1751f1e9c317f09 (patch) | |
| tree | 21524e7af7b2d9514d5ae9e27c67af0db8c193c2 /arch/arm64/include/asm/cpufeature.h | |
| parent | 7513cc8a1b741bee6fb39cbb94a9842d37ca3ace (diff) | |
| download | lwn-21047e91a5a674b97ebbf2c2c1751f1e9c317f09.tar.gz lwn-21047e91a5a674b97ebbf2c2c1751f1e9c317f09.zip | |
arm64: Check if GMID_EL1.BS is the same on all CPUs
The GMID_EL1.BS field determines the number of tags accessed by the
LDGM/STGM instructions (EL1 and up), used by the kernel for copying or
zeroing page tags.
Taint the kernel if GMID_EL1.BS differs between CPUs but only of
CONFIG_ARM64_MTE is enabled.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Suzuki K Poulose <Suzuki.Poulose@arm.com>
Link: https://lore.kernel.org/r/20210526193621.21559-3-catalin.marinas@arm.com
Signed-off-by: Will Deacon <will@kernel.org>
Diffstat (limited to 'arch/arm64/include/asm/cpufeature.h')
| -rw-r--r-- | arch/arm64/include/asm/cpufeature.h | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/arm64/include/asm/cpufeature.h b/arch/arm64/include/asm/cpufeature.h index 338840c00e8e..650de920e067 100644 --- a/arch/arm64/include/asm/cpufeature.h +++ b/arch/arm64/include/asm/cpufeature.h @@ -619,6 +619,13 @@ static inline bool id_aa64pfr0_sve(u64 pfr0) return val > 0; } +static inline bool id_aa64pfr1_mte(u64 pfr1) +{ + u32 val = cpuid_feature_extract_unsigned_field(pfr1, ID_AA64PFR1_MTE_SHIFT); + + return val >= ID_AA64PFR1_MTE; +} + void __init setup_cpu_features(void); void check_local_cpu_capabilities(void); |