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author | Arnd Bergmann <arnd@arndb.de> | 2023-12-22 11:41:53 +0000 |
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committer | Arnd Bergmann <arnd@arndb.de> | 2023-12-22 11:42:00 +0000 |
commit | 81f5afc68bfa3a6bc9cf40ab9deeb5f6af04da1f (patch) | |
tree | a2e68a04d9227f18ea5144c2297e81b8742a1cd3 /arch/arm64/configs | |
parent | 6863c7c6357cabcc6af43e0d085bdf2b88279f03 (diff) | |
parent | 48a9ba5eb4d720c6e21c6e4d2a6fb6e1a97f5f2a (diff) | |
download | lwn-81f5afc68bfa3a6bc9cf40ab9deeb5f6af04da1f.tar.gz lwn-81f5afc68bfa3a6bc9cf40ab9deeb5f6af04da1f.zip |
Merge tag 'qcom-arm64-defconfig-for-6.8' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/defconfig
Qualcomm ARM64 defconfig updates for v6.8
Core platform-specific drivers for SM8650, SM4450, and SDX75 are
enabled. The sound drivers for SC8280XP and SM8650 are enabled.
Lastly the UEFI Secure App driver, providing EFI variable access on some
platforms is enabled.
* tag 'qcom-arm64-defconfig-for-6.8' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
arm64: defconfig: enable Qualcomm WSA884x driver
arm64: defconfig: enable Qualcomm UEFI Secure App driver
arm64: defconfig: enable Qualcomm sc8280xp sound drivers
arm64: defconfig: enable clock controller and pinctrl
arm64: deconfig: enable Qualcomm SM8650 SoC drivers
arm64: defconfig: Enable GCC, pinctrl and interconnect for SDX75
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm64/configs')
-rw-r--r-- | arch/arm64/configs/defconfig | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index d10a0bb19e98..98c67396e7f6 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -253,6 +253,8 @@ CONFIG_RASPBERRYPI_FIRMWARE=y CONFIG_INTEL_STRATIX10_SERVICE=y CONFIG_INTEL_STRATIX10_RSU=m CONFIG_MTK_ADSP_IPC=m +CONFIG_QCOM_QSEECOM=y +CONFIG_QCOM_QSEECOM_UEFISECAPP=y CONFIG_EFI_CAPSULE_LOADER=y CONFIG_IMX_SCU=y CONFIG_IMX_SCU_PD=y @@ -602,6 +604,8 @@ CONFIG_PINCTRL_SC8280XP=y CONFIG_PINCTRL_SDM660=y CONFIG_PINCTRL_SDM670=y CONFIG_PINCTRL_SDM845=y +CONFIG_PINCTRL_SDX75=y +CONFIG_PINCTRL_SM4450=y CONFIG_PINCTRL_SM6115=y CONFIG_PINCTRL_SM6115_LPASS_LPI=m CONFIG_PINCTRL_SM6125=y @@ -616,6 +620,7 @@ CONFIG_PINCTRL_SM8450=y CONFIG_PINCTRL_SM8450_LPASS_LPI=m CONFIG_PINCTRL_SC8280XP_LPASS_LPI=m CONFIG_PINCTRL_SM8550=y +CONFIG_PINCTRL_SM8650=y CONFIG_PINCTRL_SM8550_LPASS_LPI=m CONFIG_PINCTRL_LPASS_LPI=m CONFIG_GPIO_AGGREGATOR=m @@ -933,6 +938,7 @@ CONFIG_SND_SOC_APQ8016_SBC=m CONFIG_SND_SOC_MSM8996=m CONFIG_SND_SOC_SDM845=m CONFIG_SND_SOC_SM8250=m +CONFIG_SND_SOC_SC8280XP=m CONFIG_SND_SOC_SC7180=m CONFIG_SND_SOC_SC7280=m CONFIG_SND_SOC_ROCKCHIP=m @@ -994,6 +1000,8 @@ CONFIG_SND_SOC_WM8960=m CONFIG_SND_SOC_WM8962=m CONFIG_SND_SOC_WM8978=m CONFIG_SND_SOC_WSA881X=m +CONFIG_SND_SOC_WSA883X=m +CONFIG_SND_SOC_WSA884X=m CONFIG_SND_SOC_NAU8822=m CONFIG_SND_SOC_LPASS_WSA_MACRO=m CONFIG_SND_SOC_LPASS_VA_MACRO=m @@ -1271,19 +1279,25 @@ CONFIG_SDM_GPUCC_845=y CONFIG_SDM_VIDEOCC_845=y CONFIG_SDM_DISPCC_845=y CONFIG_SDM_LPASSCC_845=m +CONFIG_SDX_GCC_75=y CONFIG_SM_CAMCC_8250=m CONFIG_SM_DISPCC_6115=m CONFIG_SM_DISPCC_8250=y CONFIG_SM_DISPCC_8450=m CONFIG_SM_DISPCC_8550=m +CONFIG_SM_DISPCC_8650=m +CONFIG_SM_GCC_4450=y CONFIG_SM_GCC_6115=y CONFIG_SM_GCC_8350=y CONFIG_SM_GCC_8450=y CONFIG_SM_GCC_8550=y +CONFIG_SM_GCC_8650=y CONFIG_SM_TCSRCC_8550=y +CONFIG_SM_TCSRCC_8650=y CONFIG_SM_GPUCC_6115=m CONFIG_SM_GPUCC_8150=y CONFIG_SM_GPUCC_8250=y +CONFIG_SM_GPUCC_8650=m CONFIG_SM_VIDEOCC_8250=y CONFIG_QCOM_HFPLL=y CONFIG_CLK_GFM_LPASS_SM8250=m @@ -1540,11 +1554,13 @@ CONFIG_INTERCONNECT_QCOM_SC7280=y CONFIG_INTERCONNECT_QCOM_SC8180X=y CONFIG_INTERCONNECT_QCOM_SC8280XP=y CONFIG_INTERCONNECT_QCOM_SDM845=y +CONFIG_INTERCONNECT_QCOM_SDX75=y CONFIG_INTERCONNECT_QCOM_SM8150=m CONFIG_INTERCONNECT_QCOM_SM8250=m CONFIG_INTERCONNECT_QCOM_SM8350=m CONFIG_INTERCONNECT_QCOM_SM8450=y CONFIG_INTERCONNECT_QCOM_SM8550=y +CONFIG_INTERCONNECT_QCOM_SM8650=y CONFIG_COUNTER=m CONFIG_RZ_MTU3_CNT=m CONFIG_HTE=y |