diff options
| author | Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> | 2023-05-22 16:59:49 +0200 |
|---|---|---|
| committer | Michal Simek <michal.simek@amd.com> | 2023-06-05 13:15:02 +0200 |
| commit | f8673fd5700257576b23e0f6de71c153bac23978 (patch) | |
| tree | b53a07d474e631e7c484d68db6417d7b85076e3d /arch/arm64/boot/dts/xilinx/zynqmp-zcu100-revC.dts | |
| parent | c720a1f5e6ee8cb39c28435efc0819cec84d6ee2 (diff) | |
| download | lwn-f8673fd5700257576b23e0f6de71c153bac23978.tar.gz lwn-f8673fd5700257576b23e0f6de71c153bac23978.zip | |
arm64: zynqmp: Fix usb node drive strength and slew rate
As per design, all input/rx pins should have fast slew rate and 12mA
drive strength. Rest all pins should be slow slew rate and 4mA drive
strength. Fix usb nodes as per this and remove setting of slow slew rate
for all the usb group pins.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/379071f44ceb27a0e32d74e13221640922d989d1.1684767562.git.michal.simek@amd.com
Diffstat (limited to 'arch/arm64/boot/dts/xilinx/zynqmp-zcu100-revC.dts')
| -rw-r--r-- | arch/arm64/boot/dts/xilinx/zynqmp-zcu100-revC.dts | 13 |
1 files changed, 10 insertions, 3 deletions
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu100-revC.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu100-revC.dts index 544801814bd5..44d1f351bb75 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu100-revC.dts +++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu100-revC.dts @@ -2,7 +2,8 @@ /* * dts file for Xilinx ZynqMP ZCU100 revC * - * (C) Copyright 2016 - 2021, Xilinx, Inc. + * (C) Copyright 2016 - 2022, Xilinx, Inc. + * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc. * * Michal Simek <michal.simek@amd.com> * Nathalie Chan King Choy @@ -432,19 +433,22 @@ conf { groups = "usb0_0_grp"; - slew-rate = <SLEW_RATE_SLOW>; power-source = <IO_STANDARD_LVCMOS18>; }; conf-rx { pins = "MIO52", "MIO53", "MIO55"; bias-high-impedance; + drive-strength = <12>; + slew-rate = <SLEW_RATE_FAST>; }; conf-tx { pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59", "MIO60", "MIO61", "MIO62", "MIO63"; bias-disable; + drive-strength = <4>; + slew-rate = <SLEW_RATE_SLOW>; }; }; @@ -456,19 +460,22 @@ conf { groups = "usb1_0_grp"; - slew-rate = <SLEW_RATE_SLOW>; power-source = <IO_STANDARD_LVCMOS18>; }; conf-rx { pins = "MIO64", "MIO65", "MIO67"; bias-high-impedance; + drive-strength = <12>; + slew-rate = <SLEW_RATE_FAST>; }; conf-tx { pins = "MIO66", "MIO68", "MIO69", "MIO70", "MIO71", "MIO72", "MIO73", "MIO74", "MIO75"; bias-disable; + drive-strength = <4>; + slew-rate = <SLEW_RATE_SLOW>; }; }; }; |