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| author | Peter Geis <pgwipeout@gmail.com> | 2022-05-11 11:01:17 -0400 |
|---|---|---|
| committer | Heiko Stuebner <heiko@sntech.de> | 2022-06-07 10:31:20 +0200 |
| commit | b181a1e8b3ffc0b4d723245765ead3ac5f32e308 (patch) | |
| tree | d8d1c0a634cc2d68887197eba8111182525a0747 /arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts | |
| parent | 28ae8a98494f09d1d2bee2be16fc5b575dbac6ea (diff) | |
| download | lwn-b181a1e8b3ffc0b4d723245765ead3ac5f32e308.tar.gz lwn-b181a1e8b3ffc0b4d723245765ead3ac5f32e308.zip | |
arm64: dts: rockchip: enable sfc controller on Quartz64 Model A
Add the sfc controller binding for the Quartz64 Model A. This is not
populated by default, so leave it disabled.
Signed-off-by: Peter Geis <pgwipeout@gmail.com>
Link: https://lore.kernel.org/r/20220511150117.113070-7-pgwipeout@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts')
| -rw-r--r-- | arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts index a3f9b949643c..a02ac75916f4 100644 --- a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts +++ b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts @@ -617,6 +617,22 @@ status = "okay"; }; +&sfc { + pinctrl-0 = <&fspi_pins>; + pinctrl-names = "default"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <24000000>; + spi-rx-bus-width = <4>; + spi-tx-bus-width = <1>; + }; +}; + /* spdif is exposed on con40 pin 18 */ &spdif { status = "okay"; |