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| author | Douglas Anderson <dianders@chromium.org> | 2023-03-23 10:30:07 -0700 |
|---|---|---|
| committer | Bjorn Andersson <andersson@kernel.org> | 2023-04-07 10:54:08 -0700 |
| commit | 37f7349b56decc91c66f8039712e63740b1f25f9 (patch) | |
| tree | 21b0f0235157abbf52d409e46d842d8dca731b78 /arch/arm64/boot/dts/qcom/sdm845.dtsi | |
| parent | 14acf21c0d3f7b7298ffcd2e5b5db4a476ec6202 (diff) | |
| download | lwn-37f7349b56decc91c66f8039712e63740b1f25f9.tar.gz lwn-37f7349b56decc91c66f8039712e63740b1f25f9.zip | |
arm64: dts: sdm845: Rename qspi data12 as data23
There are 4 qspi data pins: data0, data1, data2, and data3. Currently
we have a shared pin state for data0 and data1 (2 lane config) and a
pin state for data2 and data3 (you'd enable both this and the 2 lane
state for 4 lanes). The second state is obviously misnamed. Fix it.
Fixes: e1ce853932b7 ("arm64: dts: qcom: sdm845: Add qspi (quad SPI) node")
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230323102605.3.I88528d037b7fda4e53a40f661be5ac61628691cd@changeid
Diffstat (limited to 'arch/arm64/boot/dts/qcom/sdm845.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/qcom/sdm845.dtsi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi index e35add9f3299..e7fabd5d81ae 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -2772,7 +2772,7 @@ function = "qspi_data"; }; - qspi_data12: qspi-data12-state { + qspi_data23: qspi-data23-state { pins = "gpio93", "gpio94"; function = "qspi_data"; }; |