diff options
| author | Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> | 2022-12-22 16:13:19 +0100 |
|---|---|---|
| committer | Bjorn Andersson <andersson@kernel.org> | 2023-01-10 09:27:45 -0600 |
| commit | 0cbc0b1c5838b02c67a768392bb34732f0d384b0 (patch) | |
| tree | 8b9e8b993a40e26b4e2a9b4736d7a3f93eec05f4 /arch/arm64/boot/dts/qcom/sdm845.dtsi | |
| parent | d05e342882e4fb2ccd8e4b6af00b0b82e22ad325 (diff) | |
| download | lwn-0cbc0b1c5838b02c67a768392bb34732f0d384b0.tar.gz lwn-0cbc0b1c5838b02c67a768392bb34732f0d384b0.zip | |
arm64: dts: qcom: sdm845: do not customize SPI0 pin drive/bias
Each board should define pin drive/bias for used busses. All boards
using SPI0 (db845c and cheza) already do it, so drop the bias/drive
strength from SoC DTSI.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221222151319.122398-4-krzysztof.kozlowski@linaro.org
Diffstat (limited to 'arch/arm64/boot/dts/qcom/sdm845.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/qcom/sdm845.dtsi | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi index 6a0b48486d36..32fbfff09750 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -2853,8 +2853,6 @@ qup_spi0_default: qup-spi0-default-state { pins = "gpio0", "gpio1", "gpio2", "gpio3"; function = "qup0"; - drive-strength = <6>; - bias-disable; }; qup_spi1_default: qup-spi1-default-state { |