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author | Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> | 2022-12-13 11:19:18 +0100 |
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committer | Bjorn Andersson <andersson@kernel.org> | 2023-01-10 22:22:33 -0600 |
commit | 8da3786a91e56fe0c4aeb2c2209744474af6e517 (patch) | |
tree | 3cb6a16b46f00bec0a766e15de926c4027fa2c14 /arch/arm64/boot/dts/qcom/sc7280.dtsi | |
parent | 1f75745537222172f84783d369bbd1fb2d4b6414 (diff) | |
download | lwn-8da3786a91e56fe0c4aeb2c2209744474af6e517.tar.gz lwn-8da3786a91e56fe0c4aeb2c2209744474af6e517.zip |
arm64: dts: qcom: sc7280: correct SPMI bus address cells
The SPMI bus uses two address cells and zero size cells (second reg
entry - SPMI_USID - is not the size):
spmi@c440000: #address-cells:0:0: 2 was expected
Fixes: 14abf8dfe364 ("arm64: dts: qcom: sc7280: Add SPMI PMIC arbiter device for SC7280")
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221213101921.47924-2-krzysztof.kozlowski@linaro.org
Diffstat (limited to 'arch/arm64/boot/dts/qcom/sc7280.dtsi')
-rw-r--r-- | arch/arm64/boot/dts/qcom/sc7280.dtsi | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi index 9c1413491ee5..ff6dc6593ebe 100644 --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi @@ -4250,8 +4250,8 @@ interrupts-extended = <&pdc 1 IRQ_TYPE_LEVEL_HIGH>; qcom,ee = <0>; qcom,channel = <0>; - #address-cells = <1>; - #size-cells = <1>; + #address-cells = <2>; + #size-cells = <0>; interrupt-controller; #interrupt-cells = <4>; }; |