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| author | Sowjanya Komatineni <skomatineni@nvidia.com> | 2020-11-23 12:17:21 -0800 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2020-11-26 16:24:59 +0100 |
| commit | c84ebdfd26645731cc1d9255df94b66de489093e (patch) | |
| tree | 37824e470aa29ed14695f68998ad12e756cef6c8 /arch/arm64/boot/dts/nvidia/tegra132.dtsi | |
| parent | 6450da3dab73e25e38b7efd57b0699d3d01bde26 (diff) | |
| download | lwn-c84ebdfd26645731cc1d9255df94b66de489093e.tar.gz lwn-c84ebdfd26645731cc1d9255df94b66de489093e.zip | |
arm64: tegra: Change order of SATA resets for Tegra132 and Tegra210
Tegra AHCI dt-binding doc is converted from text based to yaml based.
dtbs_check valdiation strictly follows reset-names order specified
in yaml dt-binding.
Tegra124 thru Tegra210 has 3 resets sata, sata-oob and sata-cold.
Tegra186 has 2 resets sata and sata-cold.
This patch changes order of SATA resets to maintain proper resets
order for commonly available resets across Tegra124 thru Tegra186
for dtbs_check to pass.
Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'arch/arm64/boot/dts/nvidia/tegra132.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/nvidia/tegra132.dtsi | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm64/boot/dts/nvidia/tegra132.dtsi b/arch/arm64/boot/dts/nvidia/tegra132.dtsi index 0ce958a4f879..9928a87f593a 100644 --- a/arch/arm64/boot/dts/nvidia/tegra132.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra132.dtsi @@ -629,9 +629,9 @@ <&tegra_car TEGRA124_CLK_PLL_E>; clock-names = "sata", "sata-oob", "cml1", "pll_e"; resets = <&tegra_car 124>, - <&tegra_car 123>, - <&tegra_car 129>; - reset-names = "sata", "sata-oob", "sata-cold"; + <&tegra_car 129>, + <&tegra_car 123>; + reset-names = "sata", "sata-cold", "sata-oob"; status = "disabled"; }; |