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authorChen Feng <puck.chen@hisilicon.com>2017-01-24 16:57:28 +0800
committerWei Xu <xuwei5@hisilicon.com>2017-01-25 16:08:29 +0000
commit35ca8168133c9c035e32eff10cce94b8e8c279b3 (patch)
tree232da3b8e47d4088031933b50950595cda64e3b8 /arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
parent022e53bef93cfbec37629cf2b05ed092322dde8b (diff)
downloadlwn-35ca8168133c9c035e32eff10cce94b8e8c279b3.tar.gz
lwn-35ca8168133c9c035e32eff10cce94b8e8c279b3.zip
arm64: dts: Add dts files for Hisilicon Hi3660 SoC
Add initial dtsi file to support Hisilicon Hi3660 SoC with support of Octal core CPUs in two clusters(4 * A53 & 4 * A73). Also add dts file to support HiKey960 development board which based on Hi3660 SoC. The output console is earlycon "earlycon=pl011,0xfdf05000". And the con_init uart5 with a fixed clock, which already configured at bootloader. When clock is available, the uart5 will be modified. Tested on HiKey960 Board. Signed-off-by: Chen Feng <puck.chen@hisilicon.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Diffstat (limited to 'arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts')
-rw-r--r--arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts33
1 files changed, 33 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
new file mode 100644
index 000000000000..ff37f0a0aa93
--- /dev/null
+++ b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
@@ -0,0 +1,33 @@
+/*
+ * dts file for Hisilicon HiKey960 Development Board
+ *
+ * Copyright (C) 2016, Hisilicon Ltd.
+ *
+ */
+
+/dts-v1/;
+
+#include "hi3660.dtsi"
+
+/ {
+ model = "HiKey960";
+ compatible = "hisilicon,hi3660";
+
+ aliases {
+ serial5 = &uart5; /* console UART */
+ };
+
+ chosen {
+ stdout-path = "serial5:115200n8";
+ };
+
+ memory@0 {
+ device_type = "memory";
+ /* rewrite this at bootloader */
+ reg = <0x0 0x0 0x0 0x0>;
+ };
+};
+
+&uart5 {
+ status = "okay";
+};