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author | Will Deacon <will.deacon@arm.com> | 2015-02-03 16:14:13 +0000 |
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committer | Will Deacon <will.deacon@arm.com> | 2015-07-27 15:28:50 +0100 |
commit | c09d6a04d17d730b0463207a26ece082772b59ee (patch) | |
tree | 43aec4a96946d28bc0fd985b1219317bdcb2b8d2 /arch/arm64/Makefile | |
parent | c0385b24af15020a1e505f2c984db0d7c0d017e1 (diff) | |
download | lwn-c09d6a04d17d730b0463207a26ece082772b59ee.tar.gz lwn-c09d6a04d17d730b0463207a26ece082772b59ee.zip |
arm64: atomics: patch in lse instructions when supported by the CPU
On CPUs which support the LSE atomic instructions introduced in ARMv8.1,
it makes sense to use them in preference to ll/sc sequences.
This patch introduces runtime patching of atomic_t and atomic64_t
routines so that the call-site for the out-of-line ll/sc sequences is
patched with an LSE atomic instruction when we detect that
the CPU supports it.
If binutils is not recent enough to assemble the LSE instructions, then
the ll/sc sequences are inlined as though CONFIG_ARM64_LSE_ATOMICS=n.
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'arch/arm64/Makefile')
-rw-r--r-- | arch/arm64/Makefile | 13 |
1 files changed, 12 insertions, 1 deletions
diff --git a/arch/arm64/Makefile b/arch/arm64/Makefile index 0953a97b5119..15ff5b4156fd 100644 --- a/arch/arm64/Makefile +++ b/arch/arm64/Makefile @@ -17,7 +17,18 @@ GZFLAGS :=-9 KBUILD_DEFCONFIG := defconfig -KBUILD_CFLAGS += -mgeneral-regs-only +# Check for binutils support for specific extensions +lseinstr := $(call as-instr,.arch_extension lse,-DCONFIG_AS_LSE=1) + +ifeq ($(CONFIG_ARM64_LSE_ATOMICS), y) + ifeq ($(lseinstr),) +$(warning LSE atomics not supported by binutils) + endif +endif + +KBUILD_CFLAGS += -mgeneral-regs-only $(lseinstr) +KBUILD_AFLAGS += $(lseinstr) + ifeq ($(CONFIG_CPU_BIG_ENDIAN), y) KBUILD_CPPFLAGS += -mbig-endian AS += -EB |