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| author | Baptiste Reynal <b.reynal@virtualopensystems.com> | 2015-03-04 16:51:06 +0100 |
|---|---|---|
| committer | Joerg Roedel <jroedel@suse.de> | 2015-03-23 15:21:26 +0100 |
| commit | 83a60ed8f0b5ce550afd5802b60468578db4e055 (patch) | |
| tree | 9794a804ce571a32042363c983aa00a3d9c3c7a7 /arch/arm/xen | |
| parent | bc465aa9d045feb0e13b4a8f32cc33c1943f62d6 (diff) | |
| download | lwn-83a60ed8f0b5ce550afd5802b60468578db4e055.tar.gz lwn-83a60ed8f0b5ce550afd5802b60468578db4e055.zip | |
iommu/arm-smmu: fix ARM_SMMU_FEAT_TRANS_OPS condition
This patch is a fix to "iommu/arm-smmu: add support for iova_to_phys
through ATS1PR".
According to ARM documentation, translation registers are optional even
in SMMUv1, so ID0_S1TS needs to be checked to verify their presence.
Also, we check that the domain is a stage-1 domain.
Signed-off-by: Baptiste Reynal <b.reynal@virtualopensystems.com>
Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Joerg Roedel <jroedel@suse.de>
Diffstat (limited to 'arch/arm/xen')
0 files changed, 0 insertions, 0 deletions