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authorHans J. Koch <hjk@hansjkoch.de>2011-12-22 21:30:48 +0100
committerHans J. Koch <hjk@hansjkoch.de>2012-01-05 13:34:39 +0100
commit2e3d256de9d3db5a7ca19b61305627a516b54b45 (patch)
tree2b18d6c3b2c24138667112829bac368987a5bdc5 /arch/arm/plat-tcc/include/mach/hardware.h
parent00d79e9d0e4b49144177bc07baa015febc822c10 (diff)
downloadlwn-2e3d256de9d3db5a7ca19b61305627a516b54b45.tar.gz
lwn-2e3d256de9d3db5a7ca19b61305627a516b54b45.zip
arm: Remove plat-tcc directory
The Telechips ARM architecture is being removed. This patch deletes the arch/arm/plat-tcc/ folder. Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Harry Sievers <hsievers@csselectronic.com> Signed-off-by: Hans J. Koch <hjk@hansjkoch.de>
Diffstat (limited to 'arch/arm/plat-tcc/include/mach/hardware.h')
-rw-r--r--arch/arm/plat-tcc/include/mach/hardware.h43
1 files changed, 0 insertions, 43 deletions
diff --git a/arch/arm/plat-tcc/include/mach/hardware.h b/arch/arm/plat-tcc/include/mach/hardware.h
deleted file mode 100644
index e70d126ccaf3..000000000000
--- a/arch/arm/plat-tcc/include/mach/hardware.h
+++ /dev/null
@@ -1,43 +0,0 @@
-/*
- * Author: RidgeRun, Inc. Greg Lonnon <glonnon@ridgerun.com>
- * Reorganized for Linux-2.6 by Tony Lindgren <tony@atomide.com>
- * and Dirk Behme <dirk.behme@de.bosch.com>
- * Rewritten by: <linux@telechips.com>
- * Description: Hardware definitions for TCC8300 processors and boards
- *
- * Copyright (C) 2001 RidgeRun, Inc.
- * Copyright (C) 2008-2009 Telechips
- *
- * Modifications for mainline (C) 2009 Hans J. Koch <hjk@linutronix.de>
- *
- * Licensed under the terms of the GNU Pulic License version 2.
- */
-
-#ifndef __ASM_ARCH_TCC_HARDWARE_H
-#define __ASM_ARCH_TCC_HARDWARE_H
-
-#include <asm/sizes.h>
-#ifndef __ASSEMBLER__
-#include <asm/types.h>
-#endif
-#include <mach/io.h>
-
-/*
- * ----------------------------------------------------------------------------
- * Clocks
- * ----------------------------------------------------------------------------
- */
-#define CLKGEN_REG_BASE 0xfffece00
-#define ARM_CKCTL (CLKGEN_REG_BASE + 0x0)
-#define ARM_IDLECT1 (CLKGEN_REG_BASE + 0x4)
-#define ARM_IDLECT2 (CLKGEN_REG_BASE + 0x8)
-#define ARM_EWUPCT (CLKGEN_REG_BASE + 0xC)
-#define ARM_RSTCT1 (CLKGEN_REG_BASE + 0x10)
-#define ARM_RSTCT2 (CLKGEN_REG_BASE + 0x14)
-#define ARM_SYSST (CLKGEN_REG_BASE + 0x18)
-#define ARM_IDLECT3 (CLKGEN_REG_BASE + 0x24)
-
-/* DPLL control registers */
-#define DPLL_CTL 0xfffecf00
-
-#endif /* __ASM_ARCH_TCC_HARDWARE_H */