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authorThomas Gleixner <tglx@linutronix.de>2011-04-04 14:29:58 +0200
committerSascha Hauer <s.hauer@pengutronix.de>2011-04-12 09:48:17 +0200
commitb5eee2fdefc89df312034e5e0e6f5dd55c4e9bae (patch)
tree1c24a63c6bce190ec4b55136bb87f689eccd0332 /arch/arm/plat-mxc/gpio.c
parent0575b4b83edb0a766a9c1518a5da57780f386340 (diff)
downloadlwn-b5eee2fdefc89df312034e5e0e6f5dd55c4e9bae.tar.gz
lwn-b5eee2fdefc89df312034e5e0e6f5dd55c4e9bae.zip
ARM: mxc: Add missing lockdep annotation
The irq_set_wake() function of the gpio irq_chip calls enable/disable_irq_wake() on the demultiplex interrupt. That leads to a lockdep warning "INFO: possible recursive locking detected" because irq_set_type() is called under irq_desc->lock and the *_irq_wake() calls take irq_desc->lock of the demux interrupt. Tell lockdep that the gpio irqs are in a different lock class. Documentation/SubmitChecklist: 15: All codepaths have been exercised with all lockdep features enabled. That's a non-optional requirement, AFAICT. Reported-and-tested-by: Arnaud Patard <arnaud.patard@rtp-net.org> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> LAKML-Reference: alpine.LFD.2.00.1104041416290.19945@localhost6.localdomain6 Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/plat-mxc/gpio.c')
-rw-r--r--arch/arm/plat-mxc/gpio.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/arm/plat-mxc/gpio.c b/arch/arm/plat-mxc/gpio.c
index 7a107246fd98..6cd6d7f686f6 100644
--- a/arch/arm/plat-mxc/gpio.c
+++ b/arch/arm/plat-mxc/gpio.c
@@ -295,6 +295,12 @@ static int mxc_gpio_direction_output(struct gpio_chip *chip,
return 0;
}
+/*
+ * This lock class tells lockdep that GPIO irqs are in a different
+ * category than their parents, so it won't report false recursion.
+ */
+static struct lock_class_key gpio_lock_class;
+
int __init mxc_gpio_init(struct mxc_gpio_port *port, int cnt)
{
int i, j;
@@ -311,6 +317,7 @@ int __init mxc_gpio_init(struct mxc_gpio_port *port, int cnt)
__raw_writel(~0, port[i].base + GPIO_ISR);
for (j = port[i].virtual_irq_start;
j < port[i].virtual_irq_start + 32; j++) {
+ irq_set_lockdep_class(j, &gpio_lock_class);
irq_set_chip_and_handler(j, &gpio_irq_chip,
handle_level_irq);
set_irq_flags(j, IRQF_VALID);