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| author | Will Deacon <will.deacon@arm.com> | 2011-11-15 13:25:04 +0000 |
|---|---|---|
| committer | Will Deacon <will.deacon@arm.com> | 2011-12-06 14:04:14 +0000 |
| commit | 1a4baafa7d203da1cceb302c2df38f0fea1c17a1 (patch) | |
| tree | f64d1b22be6f3255ccb73470a9799890972bd670 /arch/arm/mm/proc-sa110.S | |
| parent | e6eadc67873d5f363c864cd7723104e7d47dcb44 (diff) | |
| download | lwn-1a4baafa7d203da1cceb302c2df38f0fea1c17a1.tar.gz lwn-1a4baafa7d203da1cceb302c2df38f0fea1c17a1.zip | |
ARM: proc-*.S: place cpu_reset functions into .idmap.text section
The CPU reset functions disable the MMU and therefore must be executed
with an identity mapping in place.
This patch places the CPU reset functions into the .idmap.text section,
causing the idmap code to include them as part of the identity mapping.
Acked-by: Dave Martin <dave.martin@linaro.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'arch/arm/mm/proc-sa110.S')
| -rw-r--r-- | arch/arm/mm/proc-sa110.S | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm/mm/proc-sa110.S b/arch/arm/mm/proc-sa110.S index d50ada26edd6..775d70fba937 100644 --- a/arch/arm/mm/proc-sa110.S +++ b/arch/arm/mm/proc-sa110.S @@ -62,6 +62,7 @@ ENTRY(cpu_sa110_proc_fin) * loc: location to jump to for soft reset */ .align 5 + .pushsection .idmap.text, "ax" ENTRY(cpu_sa110_reset) mov ip, #0 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches @@ -74,6 +75,8 @@ ENTRY(cpu_sa110_reset) bic ip, ip, #0x1100 @ ...i...s........ mcr p15, 0, ip, c1, c0, 0 @ ctrl register mov pc, r0 +ENDPROC(cpu_sa110_reset) + .popsection /* * cpu_sa110_do_idle(type) |