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author | Stephen Warren <swarren@nvidia.com> | 2013-11-05 14:10:53 -0700 |
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committer | Stephen Warren <swarren@nvidia.com> | 2013-12-04 12:25:22 -0700 |
commit | 2f1d70af28a94988c1e8fba2ae03d4c7e68e690b (patch) | |
tree | e64da72f581414009ff50c27591483def90c3e05 /arch/arm/mach-tegra | |
parent | 354935a9e804878ec64a86ad8b7f091d544dcb54 (diff) | |
download | lwn-2f1d70af28a94988c1e8fba2ae03d4c7e68e690b.tar.gz lwn-2f1d70af28a94988c1e8fba2ae03d4c7e68e690b.zip |
ARM: tegra: don't hard-code DEBUG_LL baud rate
Stop writing to the UART clock divider registers in the Tegra DEBUG_LL
code. This allows the DEBUG_LL output to use whatever baud rate was set
up by the bootloader. Some users are using higher rates than 115200.
This removes the only usage of tegra_uart_config[3], so reduce the size
allocated for that array.
Finally, fix busyuart() so that it only waits for THRE and not TEMT. For
some reason, TEMT doesn't get asserted (at least on Tegra30 Beaver) at
9600 baud, even though it does at 115200 baud. This sounds like a HW bug,
but I haven't investigated. For reference, U-Boot's serial code has
always only checked THRE, and not checked TEMT.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Paul Walmsley <pwalmsley@nvidia.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra')
-rw-r--r-- | arch/arm/mach-tegra/tegra.c | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/arch/arm/mach-tegra/tegra.c b/arch/arm/mach-tegra/tegra.c index 73368176c6e8..ea14d380fc0c 100644 --- a/arch/arm/mach-tegra/tegra.c +++ b/arch/arm/mach-tegra/tegra.c @@ -60,15 +60,13 @@ * kernel is loaded. The data is declared here rather than debug-macro.S so * that multiple inclusions of debug-macro.S point at the same data. */ -u32 tegra_uart_config[4] = { +u32 tegra_uart_config[3] = { /* Debug UART initialization required */ 1, /* Debug UART physical address */ 0, /* Debug UART virtual address */ 0, - /* Scratch space for debug macro */ - 0, }; static void __init tegra_init_cache(void) |