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author | Thomas Gleixner <tglx@linutronix.de> | 2011-03-24 13:25:22 +0100 |
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committer | Thomas Gleixner <tglx@linutronix.de> | 2011-03-29 14:47:57 +0200 |
commit | 6845664a6a7d443f03883db59d10749d38d98b8e (patch) | |
tree | 4b4499f4d41f24152190220d93ea186fbf991fca /arch/arm/mach-tegra/gpio.c | |
parent | 25a5662a13e604d86b0a9fd71703582a7393d8ec (diff) | |
download | lwn-6845664a6a7d443f03883db59d10749d38d98b8e.tar.gz lwn-6845664a6a7d443f03883db59d10749d38d98b8e.zip |
arm: Cleanup the irq namespace
Convert to the new function names. Automated with coccinelle.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch/arm/mach-tegra/gpio.c')
-rw-r--r-- | arch/arm/mach-tegra/gpio.c | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/arch/arm/mach-tegra/gpio.c b/arch/arm/mach-tegra/gpio.c index 8ab2131f41d4..4148048c4191 100644 --- a/arch/arm/mach-tegra/gpio.c +++ b/arch/arm/mach-tegra/gpio.c @@ -208,9 +208,9 @@ static int tegra_gpio_irq_set_type(struct irq_data *d, unsigned int type) spin_unlock_irqrestore(&bank->lvl_lock[port], flags); if (type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH)) - __set_irq_handler_unlocked(d->irq, handle_level_irq); + __irq_set_handler_locked(d->irq, handle_level_irq); else if (type & (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING)) - __set_irq_handler_unlocked(d->irq, handle_edge_irq); + __irq_set_handler_locked(d->irq, handle_edge_irq); return 0; } @@ -224,7 +224,7 @@ static void tegra_gpio_irq_handler(unsigned int irq, struct irq_desc *desc) desc->irq_data.chip->irq_ack(&desc->irq_data); - bank = get_irq_data(irq); + bank = irq_get_handler_data(irq); for (port = 0; port < 4; port++) { int gpio = tegra_gpio_compose(bank->bank, port, 0); @@ -301,7 +301,7 @@ void tegra_gpio_suspend(void) static int tegra_gpio_wake_enable(struct irq_data *d, unsigned int enable) { struct tegra_gpio_bank *bank = irq_data_get_irq_chip_data(d); - return set_irq_wake(bank->irq, enable); + return irq_set_irq_wake(bank->irq, enable); } #endif @@ -341,17 +341,17 @@ static int __init tegra_gpio_init(void) bank = &tegra_gpio_banks[GPIO_BANK(irq_to_gpio(i))]; irq_set_lockdep_class(i, &gpio_lock_class); - set_irq_chip_data(i, bank); - set_irq_chip(i, &tegra_gpio_irq_chip); - set_irq_handler(i, handle_simple_irq); + irq_set_chip_data(i, bank); + irq_set_chip(i, &tegra_gpio_irq_chip); + irq_set_handler(i, handle_simple_irq); set_irq_flags(i, IRQF_VALID); } for (i = 0; i < ARRAY_SIZE(tegra_gpio_banks); i++) { bank = &tegra_gpio_banks[i]; - set_irq_chained_handler(bank->irq, tegra_gpio_irq_handler); - set_irq_data(bank->irq, bank); + irq_set_chained_handler(bank->irq, tegra_gpio_irq_handler); + irq_set_handler_data(bank->irq, bank); for (j = 0; j < 4; j++) spin_lock_init(&bank->lvl_lock[j]); |