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| author | Magnus Damm <damm+renesas@opensource.se> | 2015-01-29 16:25:32 +0900 |
|---|---|---|
| committer | Simon Horman <horms+renesas@verge.net.au> | 2015-01-29 17:52:38 +0900 |
| commit | 77cf5166f21c3b73b04571311dc89a327424f594 (patch) | |
| tree | 3894ebd9e358869a6d7e79507bb70c534e440675 /arch/arm/mach-shmobile/setup-rcar-gen2.c | |
| parent | 974b072f71e350bf2c5fb9cfd5c6c9d341a53300 (diff) | |
| download | lwn-77cf5166f21c3b73b04571311dc89a327424f594.tar.gz lwn-77cf5166f21c3b73b04571311dc89a327424f594.zip | |
ARM: shmobile: r8a7790: Instantiate GIC from C board code in legacy builds
As of commit 9a1091ef0017c40a ("irqchip: gic: Support hierarchy irq
domain."), the Lager legacy board support is known to be broken.
The IRQ numbers of the GIC are now virtual, and no longer match the
hardcoded hardware IRQ numbers in the legacy platform board code.
To fix this issue specific to non-multiplatform r8a7790 and Lager:
1) Instantiate the GIC from platform board code and also
2) Skip over the DT arch timer as well as
3) Force delay setup based on DT CPU frequency
With these 3 fixes in place interrupts on Lager are now unbroken.
Partially based on legacy GIC fix by Geert Uytterhoeven, thanks to
him for the initial work.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch/arm/mach-shmobile/setup-rcar-gen2.c')
| -rw-r--r-- | arch/arm/mach-shmobile/setup-rcar-gen2.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/mach-shmobile/setup-rcar-gen2.c b/arch/arm/mach-shmobile/setup-rcar-gen2.c index 7ed92790d13f..101b3e430a0d 100644 --- a/arch/arm/mach-shmobile/setup-rcar-gen2.c +++ b/arch/arm/mach-shmobile/setup-rcar-gen2.c @@ -137,7 +137,9 @@ void __init rcar_gen2_timer_init(void) #ifdef CONFIG_COMMON_CLK rcar_gen2_clocks_init(mode); #endif +#ifdef CONFIG_ARCH_SHMOBILE_MULTI clocksource_of_init(); +#endif } struct memory_reserve_config { |