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authorKukjin Kim <kgene.kim@samsung.com>2010-09-01 13:36:59 +0900
committerKukjin Kim <kgene.kim@samsung.com>2010-10-18 18:33:03 +0900
commit2853a0efc3031dec88b47bbc50b8a6b3fe9e3cac (patch)
tree699bf83bfed62ab19e6c47344cb2c8ba95a0a9ae /arch/arm/mach-s5p64x0/setup-i2c1.c
parentf1fee5824cc2f145c2d926939ff88250245a7ac9 (diff)
downloadlwn-2853a0efc3031dec88b47bbc50b8a6b3fe9e3cac.tar.gz
lwn-2853a0efc3031dec88b47bbc50b8a6b3fe9e3cac.zip
ARM: S5P64X0: Add S5P6450 I2C support
This patch adds S5P6450 I2C support in the ARCH_S5P64X0. And moves S5P6440 I2C support files into the mach-s5p64x0 together. Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-s5p64x0/setup-i2c1.c')
-rw-r--r--arch/arm/mach-s5p64x0/setup-i2c1.c42
1 files changed, 42 insertions, 0 deletions
diff --git a/arch/arm/mach-s5p64x0/setup-i2c1.c b/arch/arm/mach-s5p64x0/setup-i2c1.c
new file mode 100644
index 000000000000..2edd7912f8e4
--- /dev/null
+++ b/arch/arm/mach-s5p64x0/setup-i2c1.c
@@ -0,0 +1,42 @@
+/* linux/arch/arm/mach-s5p64xx/setup-i2c1.c
+ *
+ * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * I2C1 GPIO configuration.
+ *
+ * Based on plat-s3c64xx/setup-i2c0.c
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/gpio.h>
+
+struct platform_device; /* don't need the contents */
+
+#include <plat/gpio-cfg.h>
+#include <plat/iic.h>
+
+#include <mach/i2c.h>
+
+void s5p6440_i2c1_cfg_gpio(struct platform_device *dev)
+{
+ s3c_gpio_cfgpin(S5P6440_GPR(9), S3C_GPIO_SFN(6));
+ s3c_gpio_setpull(S5P6440_GPR(9), S3C_GPIO_PULL_UP);
+ s3c_gpio_cfgpin(S5P6440_GPR(10), S3C_GPIO_SFN(6));
+ s3c_gpio_setpull(S5P6440_GPR(10), S3C_GPIO_PULL_UP);
+}
+
+void s5p6450_i2c1_cfg_gpio(struct platform_device *dev)
+{
+ s3c_gpio_cfgpin(S5P6450_GPR(9), S3C_GPIO_SFN(6));
+ s3c_gpio_setpull(S5P6450_GPR(9), S3C_GPIO_PULL_UP);
+ s3c_gpio_cfgpin(S5P6450_GPR(10), S3C_GPIO_SFN(6));
+ s3c_gpio_setpull(S5P6450_GPR(10), S3C_GPIO_PULL_UP);
+}
+
+void s3c_i2c1_cfg_gpio(struct platform_device *dev) { }