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| author | Ben Dooks <ben-linux@fluff.org> | 2010-05-27 15:54:06 +0900 |
|---|---|---|
| committer | Kukjin Kim <kgene.kim@samsung.com> | 2010-10-23 11:49:09 +0900 |
| commit | 2618b555d2734df3c8ca71df319d318489318083 (patch) | |
| tree | 769a8f009d384beefe9419449cf5536f11a9a2d4 /arch/arm/mach-s3c64xx/dev-audio.c | |
| parent | f5321760ce1d65fd69facc982b8523b19edf07a0 (diff) | |
| download | lwn-2618b555d2734df3c8ca71df319d318489318083.tar.gz lwn-2618b555d2734df3c8ca71df319d318489318083.zip | |
ARM: S3C64XX: Change to using s3c_gpio_cfgpin_range()
Change the code setting ranges of GPIO pins using s3c_gpio_cfgpin() to
use the recently introduced s3c_gpio_cfgpin_range().
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-s3c64xx/dev-audio.c')
| -rw-r--r-- | arch/arm/mach-s3c64xx/dev-audio.c | 53 |
1 files changed, 15 insertions, 38 deletions
diff --git a/arch/arm/mach-s3c64xx/dev-audio.c b/arch/arm/mach-s3c64xx/dev-audio.c index c9a44969e648..e4bb02395d9e 100644 --- a/arch/arm/mach-s3c64xx/dev-audio.c +++ b/arch/arm/mach-s3c64xx/dev-audio.c @@ -24,25 +24,22 @@ static int s3c64xx_i2sv3_cfg_gpio(struct platform_device *pdev) { + unsigned int base; + switch (pdev->id) { case 0: - s3c_gpio_cfgpin(S3C64XX_GPD(0), S3C_GPIO_SFN(3)); - s3c_gpio_cfgpin(S3C64XX_GPD(1), S3C_GPIO_SFN(3)); - s3c_gpio_cfgpin(S3C64XX_GPD(2), S3C_GPIO_SFN(3)); - s3c_gpio_cfgpin(S3C64XX_GPD(3), S3C_GPIO_SFN(3)); - s3c_gpio_cfgpin(S3C64XX_GPD(4), S3C_GPIO_SFN(3)); + base = S3C64XX_GPD(0); break; case 1: - s3c_gpio_cfgpin(S3C64XX_GPE(0), S3C_GPIO_SFN(3)); - s3c_gpio_cfgpin(S3C64XX_GPE(1), S3C_GPIO_SFN(3)); - s3c_gpio_cfgpin(S3C64XX_GPE(2), S3C_GPIO_SFN(3)); - s3c_gpio_cfgpin(S3C64XX_GPE(3), S3C_GPIO_SFN(3)); - s3c_gpio_cfgpin(S3C64XX_GPE(4), S3C_GPIO_SFN(3)); + base = S3C64XX_GPE(0); + break; default: printk(KERN_DEBUG "Invalid I2S Controller number!"); return -EINVAL; } + s3c_gpio_cfgpin_range(base, 5, S3C_GPIO_SFN(3)); + return 0; } @@ -51,10 +48,7 @@ static int s3c64xx_i2sv4_cfg_gpio(struct platform_device *pdev) s3c_gpio_cfgpin(S3C64XX_GPC(4), S3C_GPIO_SFN(5)); s3c_gpio_cfgpin(S3C64XX_GPC(5), S3C_GPIO_SFN(5)); s3c_gpio_cfgpin(S3C64XX_GPC(7), S3C_GPIO_SFN(5)); - s3c_gpio_cfgpin(S3C64XX_GPH(6), S3C_GPIO_SFN(4)); - s3c_gpio_cfgpin(S3C64XX_GPH(7), S3C_GPIO_SFN(4)); - s3c_gpio_cfgpin(S3C64XX_GPH(8), S3C_GPIO_SFN(4)); - s3c_gpio_cfgpin(S3C64XX_GPH(9), S3C_GPIO_SFN(4)); + s3c_gpio_cfgpin_range(S3C64XX_GPH(6), 4, S3C_GPIO_SFN(4)); return 0; } @@ -163,26 +157,21 @@ EXPORT_SYMBOL(s3c64xx_device_iisv4); static int s3c64xx_pcm_cfg_gpio(struct platform_device *pdev) { + unsigned int base; + switch (pdev->id) { case 0: - s3c_gpio_cfgpin(S3C64XX_GPD(0), S3C_GPIO_SFN(2)); - s3c_gpio_cfgpin(S3C64XX_GPD(1), S3C_GPIO_SFN(2)); - s3c_gpio_cfgpin(S3C64XX_GPD(2), S3C_GPIO_SFN(2)); - s3c_gpio_cfgpin(S3C64XX_GPD(3), S3C_GPIO_SFN(2)); - s3c_gpio_cfgpin(S3C64XX_GPD(4), S3C_GPIO_SFN(2)); + base = S3C64XX_GPD(0); break; case 1: - s3c_gpio_cfgpin(S3C64XX_GPE(0), S3C_GPIO_SFN(2)); - s3c_gpio_cfgpin(S3C64XX_GPE(1), S3C_GPIO_SFN(2)); - s3c_gpio_cfgpin(S3C64XX_GPE(2), S3C_GPIO_SFN(2)); - s3c_gpio_cfgpin(S3C64XX_GPE(3), S3C_GPIO_SFN(2)); - s3c_gpio_cfgpin(S3C64XX_GPE(4), S3C_GPIO_SFN(2)); + base = S3C64XX_GPE(0); break; default: printk(KERN_DEBUG "Invalid PCM Controller number!"); return -EINVAL; } + s3c_gpio_cfgpin_range(base, 5, S3C_GPIO_SFN(2)); return 0; } @@ -256,24 +245,12 @@ EXPORT_SYMBOL(s3c64xx_device_pcm1); static int s3c64xx_ac97_cfg_gpd(struct platform_device *pdev) { - s3c_gpio_cfgpin(S3C64XX_GPD(0), S3C_GPIO_SFN(4)); - s3c_gpio_cfgpin(S3C64XX_GPD(1), S3C_GPIO_SFN(4)); - s3c_gpio_cfgpin(S3C64XX_GPD(2), S3C_GPIO_SFN(4)); - s3c_gpio_cfgpin(S3C64XX_GPD(3), S3C_GPIO_SFN(4)); - s3c_gpio_cfgpin(S3C64XX_GPD(4), S3C_GPIO_SFN(4)); - - return 0; + return s3c_gpio_cfgpin_range(S3C64XX_GPD(0), 5, S3C_GPIO_SFN(4)); } static int s3c64xx_ac97_cfg_gpe(struct platform_device *pdev) { - s3c_gpio_cfgpin(S3C64XX_GPE(0), S3C_GPIO_SFN(4)); - s3c_gpio_cfgpin(S3C64XX_GPE(1), S3C_GPIO_SFN(4)); - s3c_gpio_cfgpin(S3C64XX_GPE(2), S3C_GPIO_SFN(4)); - s3c_gpio_cfgpin(S3C64XX_GPE(3), S3C_GPIO_SFN(4)); - s3c_gpio_cfgpin(S3C64XX_GPE(4), S3C_GPIO_SFN(4)); - - return 0; + return s3c_gpio_cfgpin_range(S3C64XX_GPE(0), 5, S3C_GPIO_SFN(4)); } static struct resource s3c64xx_ac97_resource[] = { |