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authorStephen Boyd <sboyd@kernel.org>2019-05-07 11:46:02 -0700
committerStephen Boyd <sboyd@kernel.org>2019-05-07 11:46:02 -0700
commit0caf000817353cfc5db22363ecdac63b83d3a3f9 (patch)
tree0921f1ab48c2b28498def22c13b9228f39a93b79 /arch/arm/mach-omap2
parentff060019f4e536b7456fb5d4ac7891b102cb4a44 (diff)
parent90b6c5c73c6904ac200161fc38974d867f0535b0 (diff)
downloadlwn-0caf000817353cfc5db22363ecdac63b83d3a3f9.tar.gz
lwn-0caf000817353cfc5db22363ecdac63b83d3a3f9.zip
Merge branch 'clk-ti' into clk-next
* clk-ti: clk: Remove CLK_IS_BASIC clk flag clk: ti: dra7: disable the RNG and TIMER12 clkctrl clocks on HS devices clk: ti: dra7x: prevent non-existing clkctrl clocks from registering ARM: omap2+: hwmod: drop CLK_IS_BASIC flag usage clk: ti: export the omap2_clk_is_hw_omap call
Diffstat (limited to 'arch/arm/mach-omap2')
-rw-r--r--arch/arm/mach-omap2/clock.c3
-rw-r--r--arch/arm/mach-omap2/omap_hwmod.c4
2 files changed, 5 insertions, 2 deletions
diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c
index 42881f21cede..3e0f09cc0028 100644
--- a/arch/arm/mach-omap2/clock.c
+++ b/arch/arm/mach-omap2/clock.c
@@ -119,6 +119,9 @@ void __init ti_clk_init_features(void)
if (cpu_is_omap343x())
features.flags |= TI_CLK_DPLL_HAS_FREQSEL;
+ if (omap_type() == OMAP2_DEVICE_TYPE_GP)
+ features.flags |= TI_CLK_DEVICE_TYPE_GP;
+
/* Idlest value for interface clocks.
* 24xx uses 0 to indicate not ready, and 1 to indicate ready.
* 34xx reverses this, just to keep us on our toes
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 3a04c73ac03c..baadddf9aad4 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -648,10 +648,10 @@ static struct clockdomain *_get_clkdm(struct omap_hwmod *oh)
if (oh->clkdm) {
return oh->clkdm;
} else if (oh->_clk) {
- if (__clk_get_flags(oh->_clk) & CLK_IS_BASIC)
+ if (!omap2_clk_is_hw_omap(__clk_get_hw(oh->_clk)))
return NULL;
clk = to_clk_hw_omap(__clk_get_hw(oh->_clk));
- return clk->clkdm;
+ return clk->clkdm;
}
return NULL;
}