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author | Jean Pihet <jean.pihet@newoldbits.com> | 2011-03-03 11:25:43 +0100 |
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committer | Kevin Hilman <khilman@ti.com> | 2011-03-11 07:21:44 -0800 |
commit | 5e7c58dc8d9b7f31d418cf98c6a8cad84b86f510 (patch) | |
tree | 76556b2447f39104ac9a56e9d94182d0f6fce6fb /arch/arm/mach-omap2/clock.c | |
parent | a271e58cfbe345f71d39ebbae063ad2d68892470 (diff) | |
download | lwn-5e7c58dc8d9b7f31d418cf98c6a8cad84b86f510.tar.gz lwn-5e7c58dc8d9b7f31d418cf98c6a8cad84b86f510.zip |
perf: add OMAP support for the new power events
The patch adds the new power management trace points for
the OMAP architecture.
The trace points are for:
- default idle handler. Since the cpuidle framework is
instrumented in the generic way there is no need to
add trace points in the OMAP specific cpuidle handler;
- SoC clocks changes (enable, disable, set_rate),
- power domain states: the desired target state and -if different-
the actually hit state.
Because of the generic nature of the changes, OMAP3 and OMAP4 are supported.
Tested on OMAP3 with suspend/resume, cpuidle, basic DVFS.
Signed-off-by: Jean Pihet <j-pihet@ti.com>
Acked-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
Diffstat (limited to 'arch/arm/mach-omap2/clock.c')
-rw-r--r-- | arch/arm/mach-omap2/clock.c | 11 |
1 files changed, 9 insertions, 2 deletions
diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c index 46d03ccc2806..180299e4a838 100644 --- a/arch/arm/mach-omap2/clock.c +++ b/arch/arm/mach-omap2/clock.c @@ -22,7 +22,9 @@ #include <linux/clk.h> #include <linux/io.h> #include <linux/bitops.h> +#include <trace/events/power.h> +#include <asm/cpu.h> #include <plat/clock.h> #include "clockdomain.h" #include <plat/cpu.h> @@ -261,8 +263,10 @@ void omap2_clk_disable(struct clk *clk) pr_debug("clock: %s: disabling in hardware\n", clk->name); - if (clk->ops && clk->ops->disable) + if (clk->ops && clk->ops->disable) { + trace_clock_disable(clk->name, 0, smp_processor_id()); clk->ops->disable(clk); + } if (clk->clkdm) clkdm_clk_disable(clk->clkdm, clk); @@ -314,6 +318,7 @@ int omap2_clk_enable(struct clk *clk) } if (clk->ops && clk->ops->enable) { + trace_clock_enable(clk->name, 1, smp_processor_id()); ret = clk->ops->enable(clk); if (ret) { WARN(1, "clock: %s: could not enable: %d\n", @@ -353,8 +358,10 @@ int omap2_clk_set_rate(struct clk *clk, unsigned long rate) pr_debug("clock: set_rate for clock %s to rate %ld\n", clk->name, rate); /* dpll_ck, core_ck, virt_prcm_set; plus all clksel clocks */ - if (clk->set_rate) + if (clk->set_rate) { + trace_clock_set_rate(clk->name, rate, smp_processor_id()); ret = clk->set_rate(clk, rate); + } return ret; } |