diff options
| author | Sascha Hauer <s.hauer@pengutronix.de> | 2011-02-17 14:43:48 +0100 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2011-03-07 19:29:37 +0100 |
| commit | 5ae30b477e9fb7319e2976fbf3521c0fac2625f1 (patch) | |
| tree | e9c943a384e61b4552175e35a981bdf2316baba2 /arch/arm/mach-mx5 | |
| parent | 9685a3609d7f15297987c511c323b43693317960 (diff) | |
| download | lwn-5ae30b477e9fb7319e2976fbf3521c0fac2625f1.tar.gz lwn-5ae30b477e9fb7319e2976fbf3521c0fac2625f1.zip | |
ARM i.MX: Move gpio initialization to SoC specific files
This saves us from soc level dispatching in generic files
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/mach-mx5')
| -rw-r--r-- | arch/arm/mach-mx5/mm-mx50.c | 13 |
1 files changed, 11 insertions, 2 deletions
diff --git a/arch/arm/mach-mx5/mm-mx50.c b/arch/arm/mach-mx5/mm-mx50.c index 69b34269dae5..b9c363b514a9 100644 --- a/arch/arm/mach-mx5/mm-mx50.c +++ b/arch/arm/mach-mx5/mm-mx50.c @@ -26,6 +26,8 @@ #include <mach/hardware.h> #include <mach/common.h> #include <mach/iomux-v3.h> +#include <mach/gpio.h> +#include <mach/irqs.h> /* * Define the MX50 memory map. @@ -54,10 +56,17 @@ void __init imx50_init_early(void) mxc_arch_reset_init(MX50_IO_ADDRESS(MX50_WDOG_BASE_ADDR)); } -int imx50_register_gpios(void); +static struct mxc_gpio_port imx50_gpio_ports[] = { + DEFINE_IMX_GPIO_PORT_IRQ_HIGH(MX50, 0, 1, MX50_INT_GPIO1_LOW, MX50_INT_GPIO1_HIGH), + DEFINE_IMX_GPIO_PORT_IRQ_HIGH(MX50, 1, 2, MX50_INT_GPIO2_LOW, MX50_INT_GPIO2_HIGH), + DEFINE_IMX_GPIO_PORT_IRQ_HIGH(MX50, 2, 3, MX50_INT_GPIO3_LOW, MX50_INT_GPIO3_HIGH), + DEFINE_IMX_GPIO_PORT_IRQ_HIGH(MX50, 3, 4, MX50_INT_GPIO3_LOW, MX50_INT_GPIO3_HIGH), + DEFINE_IMX_GPIO_PORT_IRQ_HIGH(MX50, 4, 5, MX50_INT_GPIO3_LOW, MX50_INT_GPIO3_HIGH), + DEFINE_IMX_GPIO_PORT_IRQ_HIGH(MX50, 5, 6, MX50_INT_GPIO3_LOW, MX50_INT_GPIO3_HIGH), +}; void __init mx50_init_irq(void) { tzic_init_irq(MX50_IO_ADDRESS(MX50_TZIC_BASE_ADDR)); - imx50_register_gpios(); + mxc_gpio_init(imx50_gpio_ports, ARRAY_SIZE(imx50_gpio_ports)); } |