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authorFabio Estevam <fabio.estevam@freescale.com>2011-03-25 12:52:47 -0300
committerSascha Hauer <s.hauer@pengutronix.de>2011-05-19 13:11:00 +0200
commit2d95378b043f082192a11f8476e3f63291c3477b (patch)
treecbbff497f70ab4863362bed263b1e59e697599c3 /arch/arm/mach-mx5
parent0575b4b83edb0a766a9c1518a5da57780f386340 (diff)
downloadlwn-2d95378b043f082192a11f8476e3f63291c3477b.tar.gz
lwn-2d95378b043f082192a11f8476e3f63291c3477b.zip
ARM: mx53: Print silicon revision on boot
Having the silicon revision to appear on the boot log is a useful information. MX31, MX35 and MX51 already show the silicon revision on boot. Add support for displaying such information for MX53 as well. Tested on a mx53loco board, where it shows: CPU identified as i.MX53, silicon rev 2.0 Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> LAKML-Reference: 1301068367-18937-1-git-send-email-fabio.estevam@freescale.com Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/mach-mx5')
-rw-r--r--arch/arm/mach-mx5/clock-mx51-mx53.c1
-rw-r--r--arch/arm/mach-mx5/cpu.c23
2 files changed, 24 insertions, 0 deletions
diff --git a/arch/arm/mach-mx5/clock-mx51-mx53.c b/arch/arm/mach-mx5/clock-mx51-mx53.c
index fdbc05ed5513..6b89c1bf4eb2 100644
--- a/arch/arm/mach-mx5/clock-mx51-mx53.c
+++ b/arch/arm/mach-mx5/clock-mx51-mx53.c
@@ -1563,6 +1563,7 @@ int __init mx53_clocks_init(unsigned long ckil, unsigned long osc,
clk_enable(&iim_clk);
mx53_revision();
clk_disable(&iim_clk);
+ mx53_display_revision();
/* Set SDHC parents to be PLL2 */
clk_set_parent(&esdhc1_clk, &pll2_sw_clk);
diff --git a/arch/arm/mach-mx5/cpu.c b/arch/arm/mach-mx5/cpu.c
index 472bdfab2e55..86f87da59c64 100644
--- a/arch/arm/mach-mx5/cpu.c
+++ b/arch/arm/mach-mx5/cpu.c
@@ -166,6 +166,29 @@ int mx50_revision(void)
}
EXPORT_SYMBOL(mx50_revision);
+void mx53_display_revision(void)
+{
+ int rev;
+ char *srev;
+ rev = mx53_revision();
+
+ switch (rev) {
+ case IMX_CHIP_REVISION_1_0:
+ srev = IMX_CHIP_REVISION_1_0_STRING;
+ break;
+ case IMX_CHIP_REVISION_2_0:
+ srev = IMX_CHIP_REVISION_2_0_STRING;
+ break;
+ case IMX_CHIP_REVISION_2_1:
+ srev = IMX_CHIP_REVISION_2_1_STRING;
+ break;
+ default:
+ srev = IMX_CHIP_REVISION_UNKNOWN_STRING;
+ }
+ printk(KERN_INFO "CPU identified as i.MX53, silicon rev %s\n", srev);
+}
+EXPORT_SYMBOL(mx53_display_revision);
+
static int __init post_cpu_init(void)
{
unsigned int reg;