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author | Stepan Moskovchenko <stepanm@codeaurora.org> | 2010-11-15 18:19:35 -0800 |
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committer | Daniel Walker <dwalker@codeaurora.org> | 2010-11-30 16:05:05 -0800 |
commit | 08bd6839783319085ee0db4c888534e626225774 (patch) | |
tree | 74f0374f4905a45bad209868fac45adb9ed333a2 /arch/arm/mach-msm/iommu.c | |
parent | 0ab84745ef65043a616b36b26bec58e1cb62a742 (diff) | |
download | lwn-08bd6839783319085ee0db4c888534e626225774.tar.gz lwn-08bd6839783319085ee0db4c888534e626225774.zip |
msm: iommu: Definitions for extended memory attributes
Add the register field definitions and memory attribute
definitions that will be needed to support IOMMU
transactions with cache-coherent memory access.
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
Diffstat (limited to 'arch/arm/mach-msm/iommu.c')
0 files changed, 0 insertions, 0 deletions