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| author | Marc Zyngier <marc.zyngier@arm.com> | 2015-03-12 08:40:37 +0000 |
|---|---|---|
| committer | Shawn Guo <shawn.guo@linaro.org> | 2015-03-30 16:43:50 +0800 |
| commit | e33b67523f556aa7ddb09f1c7fa4de5c080670c9 (patch) | |
| tree | b6fc0ec34e3766a796191fd0255d2f27d151ad3e /arch/arm/mach-imx | |
| parent | 4e18a2243a8783010cc2c3c1c454e2eb279c0486 (diff) | |
| download | lwn-e33b67523f556aa7ddb09f1c7fa4de5c080670c9.tar.gz lwn-e33b67523f556aa7ddb09f1c7fa4de5c080670c9.zip | |
ARM: imx6: Allow GPC interrupts affinity to be changed
While converting the GPC code to a stacked irqchip, we lost the
possibility to change the CPU affinity of an interrupt routed
through the GPC.
This patch restore the expected behaviour by forwarding the
affinity setup to the underlying irqchip (GIC).
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Diffstat (limited to 'arch/arm/mach-imx')
| -rw-r--r-- | arch/arm/mach-imx/gpc.c | 15 |
1 files changed, 9 insertions, 6 deletions
diff --git a/arch/arm/mach-imx/gpc.c b/arch/arm/mach-imx/gpc.c index 6f1f77ed0c71..5d32e35fbe47 100644 --- a/arch/arm/mach-imx/gpc.c +++ b/arch/arm/mach-imx/gpc.c @@ -170,12 +170,15 @@ static void imx_gpc_irq_mask(struct irq_data *d) } static struct irq_chip imx_gpc_chip = { - .name = "GPC", - .irq_eoi = irq_chip_eoi_parent, - .irq_mask = imx_gpc_irq_mask, - .irq_unmask = imx_gpc_irq_unmask, - .irq_retrigger = irq_chip_retrigger_hierarchy, - .irq_set_wake = imx_gpc_irq_set_wake, + .name = "GPC", + .irq_eoi = irq_chip_eoi_parent, + .irq_mask = imx_gpc_irq_mask, + .irq_unmask = imx_gpc_irq_unmask, + .irq_retrigger = irq_chip_retrigger_hierarchy, + .irq_set_wake = imx_gpc_irq_set_wake, +#ifdef CONFIG_SMP + .irq_set_affinity = irq_chip_set_affinity_parent, +#endif }; static int imx_gpc_domain_xlate(struct irq_domain *domain, |