summaryrefslogtreecommitdiff
path: root/arch/arm/mach-imx/common.h
diff options
context:
space:
mode:
authorKevin Hilman <khilman@linaro.org>2015-06-10 16:58:05 -0700
committerKevin Hilman <khilman@linaro.org>2015-06-10 16:58:05 -0700
commit3e0d0b81ea0f7ed01a706d7c0c48b157c66f870e (patch)
treebd45b73f122815d88bf89ea5b86d2b388b99fd7e /arch/arm/mach-imx/common.h
parent2f69b1a4e8a0569861c5ea55640aba4c95857926 (diff)
parent0be5da9dc249391e3310cc2351e7af5ce211ac49 (diff)
downloadlwn-3e0d0b81ea0f7ed01a706d7c0c48b157c66f870e.tar.gz
lwn-3e0d0b81ea0f7ed01a706d7c0c48b157c66f870e.zip
Merge tag 'imx-soc-4.2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/soc
The i.MX SoC updates for 4.2: - Add new SoC i.MX7D support, which integrates two Cortex-A7 and one Cortex-M4 cores. - Support suspend from IRAM on i.MX53, so that DDR pins can be set to high impedance for more power saving during suspend. - Move i.MX clock drivers from arch/arm/mach-imx to drivers/clk/imx. - Move i.MX GPT timer driver from arch/arm/mach-imx into drivers/clocksource. - A couple of clock driver update for VF610 and i.MX6Q. - A few random code correction and improvement. * tag 'imx-soc-4.2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (44 commits) ARM: imx: imx7d requires anatop clocksource: timer-imx-gpt: remove include of <asm/mach/time.h> ARM: imx: move timer driver into drivers/clocksource ARM: imx: remove platform headers from timer driver ARM: imx: provide gpt device specific irq functions ARM: imx: get rid of variable timer_base ARM: imx: define gpt register offset per device type ARM: imx: move clock event variables into imx_timer ARM: imx: set up .set_next_event hook via imx_gpt_data ARM: imx: setup tctl register in device specific function ARM: imx: initialize gpt device type for DT boot ARM: imx: define an enum for gpt timer device type ARM: imx: move timer resources into a structure ARM: imx: use relaxed IO accessor in timer driver ARM: imx: make imx51/3 suspend optional ARM: clk-imx6q: refine sata's parent ARM: imx: clk-v610: Add clock for I2C2 and I2C3 ARM: mach-imx: iomux-imx31: Use DECLARE_BITMAP ARM: imx: add imx7d clk tree support ARM: clk: imx: update pllv3 to support imx7 ... Conflicts: arch/arm/mach-imx/Kconfig
Diffstat (limited to 'arch/arm/mach-imx/common.h')
-rw-r--r--arch/arm/mach-imx/common.h15
1 files changed, 6 insertions, 9 deletions
diff --git a/arch/arm/mach-imx/common.h b/arch/arm/mach-imx/common.h
index 0f04e30b726d..21e4e8697a58 100644
--- a/arch/arm/mach-imx/common.h
+++ b/arch/arm/mach-imx/common.h
@@ -44,7 +44,6 @@ void imx27_soc_init(void);
void imx31_soc_init(void);
void imx35_soc_init(void);
void epit_timer_init(void __iomem *base, int irq);
-void mxc_timer_init(void __iomem *, int);
int mx1_clocks_init(unsigned long fref);
int mx21_clocks_init(unsigned long lref, unsigned long fref);
int mx27_clocks_init(unsigned long fref);
@@ -56,13 +55,10 @@ struct platform_device *mxc_register_gpio(char *name, int id,
void mxc_set_cpu_type(unsigned int type);
void mxc_restart(enum reboot_mode, const char *);
void mxc_arch_reset_init(void __iomem *);
-int mx51_revision(void);
-int mx53_revision(void);
void imx_set_aips(void __iomem *);
void imx_aips_allow_unprivileged_access(const char *compat);
int mxc_device_init(void);
void imx_set_soc_revision(unsigned int rev);
-unsigned int imx_get_soc_revision(void);
void imx_init_revision_from_anatop(void);
struct device *imx_soc_device_init(void);
void imx6_enable_rbc(bool enable);
@@ -87,7 +83,6 @@ enum mx3_cpu_pwr_mode {
};
void mx3_cpu_lp_set(enum mx3_cpu_pwr_mode mode);
-void imx_print_silicon_rev(const char *cpu, int srev);
void imx_enable_cpu(int cpu, bool enable);
void imx_set_cpu_jump(int cpu, void *jump_addr);
@@ -111,7 +106,7 @@ void imx_gpc_hwirq_unmask(unsigned int hwirq);
void imx_anatop_init(void);
void imx_anatop_pre_suspend(void);
void imx_anatop_post_resume(void);
-int imx6q_set_lpm(enum mxc_cpu_pwr_mode mode);
+int imx6_set_lpm(enum mxc_cpu_pwr_mode mode);
void imx6q_set_int_mem_clk_lpm(bool enable);
void imx6sl_set_wait_clk(bool enter);
int imx_mmdc_get_ddr_type(void);
@@ -121,26 +116,28 @@ int imx_cpu_kill(unsigned int cpu);
#ifdef CONFIG_SUSPEND
void v7_cpu_resume(void);
+void imx53_suspend(void __iomem *ocram_vbase);
+extern const u32 imx53_suspend_sz;
void imx6_suspend(void __iomem *ocram_vbase);
#else
static inline void v7_cpu_resume(void) {}
+static inline void imx53_suspend(void __iomem *ocram_vbase) {}
+static const u32 imx53_suspend_sz;
static inline void imx6_suspend(void __iomem *ocram_vbase) {}
#endif
+void imx6_pm_ccm_init(const char *ccm_compat);
void imx6q_pm_init(void);
void imx6dl_pm_init(void);
void imx6sl_pm_init(void);
void imx6sx_pm_init(void);
-void imx6q_pm_set_ccm_base(void __iomem *base);
#ifdef CONFIG_PM
void imx51_pm_init(void);
void imx53_pm_init(void);
-void imx5_pm_set_ccm_base(void __iomem *base);
#else
static inline void imx51_pm_init(void) {}
static inline void imx53_pm_init(void) {}
-static inline void imx5_pm_set_ccm_base(void __iomem *base) {}
#endif
#ifdef CONFIG_NEON