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author | Liu Ying <Ying.Liu@freescale.com> | 2013-07-04 17:35:46 +0800 |
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committer | Shawn Guo <shawn.guo@linaro.org> | 2013-08-16 13:11:24 +0800 |
commit | a49e6c4b820488b79ada6da9ce609fa8611d3e00 (patch) | |
tree | ac05da5efae2363c81decfdbe941537fcf4d4996 /arch/arm/mach-imx/clk.h | |
parent | cbe7fc8aaeefc71a75c2688602ba5bb570c0a265 (diff) | |
download | lwn-a49e6c4b820488b79ada6da9ce609fa8611d3e00.tar.gz lwn-a49e6c4b820488b79ada6da9ce609fa8611d3e00.zip |
ARM: imx: add common clock support for fixup mux
One register may have several fields to control some clocks. It
is possible that the read/write values of some fields may map to
different real functional values, so writing to the other fields
in the same register may break a working clock tree. A real case
is the aclk_podf field in the register 'CCM Serial Clock Multiplexer
Register 1' of i.MX6Q/SDL SoC. This patch introduces a fixup hook
for multiplexer clock which is called before writing a value to
clock registers to support this kind of multiplexer clocks.
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Diffstat (limited to 'arch/arm/mach-imx/clk.h')
-rw-r--r-- | arch/arm/mach-imx/clk.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/mach-imx/clk.h b/arch/arm/mach-imx/clk.h index 51eb38538cc4..2534359fdedc 100644 --- a/arch/arm/mach-imx/clk.h +++ b/arch/arm/mach-imx/clk.h @@ -53,6 +53,10 @@ struct clk *imx_clk_fixup_divider(const char *name, const char *parent, void __iomem *reg, u8 shift, u8 width, void (*fixup)(u32 *val)); +struct clk *imx_clk_fixup_mux(const char *name, void __iomem *reg, + u8 shift, u8 width, const char **parents, + int num_parents, void (*fixup)(u32 *val)); + static inline struct clk *imx_clk_fixed(const char *name, int rate) { return clk_register_fixed_rate(NULL, name, NULL, CLK_IS_ROOT, rate); |