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authorShawn Guo <shawn.guo@freescale.com>2014-08-26 15:06:33 +0800
committerShawn Guo <shawn.guo@freescale.com>2014-09-16 10:06:48 +0800
commit19d863446a6b75b2f97b3012acf67c40b9f2ea1f (patch)
tree2e5c01c62795c0e0a2d33ba5f2f2bb0f00a2b43d /arch/arm/mach-imx/clk.h
parentbd404b1d337b960c44b75fcb01e3170f1d41ae80 (diff)
downloadlwn-19d863446a6b75b2f97b3012acf67c40b9f2ea1f.tar.gz
lwn-19d863446a6b75b2f97b3012acf67c40b9f2ea1f.zip
ARM: imx: add an exclusive gate clock type
There are a couple of gate clocks are mutually exclusive on i.MX6, i.e. LVDSCLK1_IBEN and LVDSCLK1_OBEN. They cannot be enabled simultaneously. This patches adds an exclusive gate clock type specifically for such case. The clock driver will need to call imx_clk_gate_exclusive() to register a gate clock with parameter exclusive_mask indicating the mask of gate bits which are mutually exclusive to this gate clock. Right now, it only handles the exclusive gate clocks which are defined in a single hardware register, which is the case we're running into today. But it can be extended to handle exclusive gate clocks defined in different registers later if needed. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Diffstat (limited to 'arch/arm/mach-imx/clk.h')
-rw-r--r--arch/arm/mach-imx/clk.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm/mach-imx/clk.h b/arch/arm/mach-imx/clk.h
index d5ba76fee115..4cdf8b6a74e8 100644
--- a/arch/arm/mach-imx/clk.h
+++ b/arch/arm/mach-imx/clk.h
@@ -36,6 +36,9 @@ struct clk *clk_register_gate2(struct device *dev, const char *name,
struct clk * imx_obtain_fixed_clock(
const char *name, unsigned long rate);
+struct clk *imx_clk_gate_exclusive(const char *name, const char *parent,
+ void __iomem *reg, u8 shift, u32 exclusive_mask);
+
static inline struct clk *imx_clk_gate2(const char *name, const char *parent,
void __iomem *reg, u8 shift)
{