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author | Alexander Shiyan <shc_work@mail.ru> | 2013-05-13 21:07:33 +0400 |
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committer | Olof Johansson <olof@lixom.net> | 2013-06-11 15:47:38 -0700 |
commit | 7dfbf1b68eb9eea411781ff9e610377febe4d6a2 (patch) | |
tree | ddbdd3b61ce70173f94ac5375c3226c49435f750 /arch/arm/mach-clps711x | |
parent | c99f72addbf5c0ad37d5a9b26f99208464d35f5c (diff) | |
download | lwn-7dfbf1b68eb9eea411781ff9e610377febe4d6a2.tar.gz lwn-7dfbf1b68eb9eea411781ff9e610377febe4d6a2.zip |
ARM: clps711x: Optimize interrupt handling
This patch modify interrupt handler for processing all penging interrupts
at once.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm/mach-clps711x')
-rw-r--r-- | arch/arm/mach-clps711x/common.c | 30 |
1 files changed, 18 insertions, 12 deletions
diff --git a/arch/arm/mach-clps711x/common.c b/arch/arm/mach-clps711x/common.c index bd658398a819..f6d1746366d4 100644 --- a/arch/arm/mach-clps711x/common.c +++ b/arch/arm/mach-clps711x/common.c @@ -215,7 +215,7 @@ void __init clps711x_init_irq(void) } } -inline u32 fls16(u32 x) +static inline u32 fls16(u32 x) { u32 r = 15; @@ -239,18 +239,24 @@ inline u32 fls16(u32 x) asmlinkage void __exception_irq_entry clps711x_handle_irq(struct pt_regs *regs) { - u32 irqstat; - void __iomem *base = CLPS711X_VIRT_BASE; + do { + u32 irqstat; + void __iomem *base = CLPS711X_VIRT_BASE; + + irqstat = readw_relaxed(base + INTSR1) & + readw_relaxed(base + INTMR1); + if (irqstat) + handle_IRQ(fls16(irqstat), regs); + + irqstat = readw_relaxed(base + INTSR2) & + readw_relaxed(base + INTMR2); + if (irqstat) { + handle_IRQ(fls16(irqstat) + 16, regs); + continue; + } - irqstat = readl_relaxed(base + INTSR1) & readl_relaxed(base + INTMR1); - if (irqstat) { - handle_IRQ(fls16(irqstat), regs); - return; - } - - irqstat = readl_relaxed(base + INTSR2) & readl_relaxed(base + INTMR2); - if (likely(irqstat)) - handle_IRQ(fls16(irqstat) + 16, regs); + break; + } while (1); } static u32 notrace clps711x_sched_clock_read(void) |