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author | Nicolas Ferre <nicolas.ferre@atmel.com> | 2010-10-14 17:19:11 +0200 |
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committer | Nicolas Ferre <nicolas.ferre@atmel.com> | 2010-10-26 11:32:48 +0200 |
commit | 1345562b449e95e2098cc60eb0eed6d2415cd0b0 (patch) | |
tree | 030983c78b1c1472765047f262b9533ae2060098 /arch/arm/mach-at91/at91sam9260.c | |
parent | ef4d63e6f51d9669e247c47b670a83511b98eb68 (diff) | |
download | lwn-1345562b449e95e2098cc60eb0eed6d2415cd0b0.tar.gz lwn-1345562b449e95e2098cc60eb0eed6d2415cd0b0.zip |
AT91: reset routine cleanup, remove not needed icache flush
Generalize assembler reset routine to allow use on several at91sam9 chips.
This patch replace double definitions of SDRAM controller registers and RSTC
registers with use of classical header files.
For this rework, we remove the not needed icache flush as it is already
done in the calling function: arm_machine_restart().
Rename at91sam9g20_reset.S to generalize to several chips.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Diffstat (limited to 'arch/arm/mach-at91/at91sam9260.c')
-rw-r--r-- | arch/arm/mach-at91/at91sam9260.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/mach-at91/at91sam9260.c b/arch/arm/mach-at91/at91sam9260.c index f8844506eabb..dfd3529cd101 100644 --- a/arch/arm/mach-at91/at91sam9260.c +++ b/arch/arm/mach-at91/at91sam9260.c @@ -25,7 +25,7 @@ #include "generic.h" #include "clock.h" -extern void at91sam9g20_reset(void); +extern void at91sam9_alt_reset(void); static struct map_desc at91sam9260_io_desc[] __initdata = { { @@ -330,7 +330,7 @@ void __init at91sam9260_initialize(unsigned long main_clock) iotable_init(at91sam9260_sram_desc, ARRAY_SIZE(at91sam9260_sram_desc)); if (cpu_is_at91sam9g20()) - at91_arch_reset = at91sam9g20_reset; + at91_arch_reset = at91sam9_alt_reset; else at91_arch_reset = at91sam9260_reset; |