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| author | Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> | 2011-11-18 01:41:28 +0800 |
|---|---|---|
| committer | Nicolas Ferre <nicolas.ferre@atmel.com> | 2012-01-20 17:22:50 +0100 |
| commit | 14f991a730f453a1c8f114ccb686f83e158fdd92 (patch) | |
| tree | cebc0df6224f92f7e554b96bad2daf7e4fe13a64 /arch/arm/mach-at91/Makefile | |
| parent | e9f68b5cc6160a473fc668054fd13f435fd4508b (diff) | |
| download | lwn-14f991a730f453a1c8f114ccb686f83e158fdd92.tar.gz lwn-14f991a730f453a1c8f114ccb686f83e158fdd92.zip | |
ARM: at91: Fix at91sam9g45 and at91cap9 reset
As on the other sam9 we need to cleanly shutdown the DDRAM before rebooting.
On those SoC the SDRAM/DDRAM controller is different. So, the assembly code
ends up being not cleanly combined with previous at91sam9_alt_restart function.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Diffstat (limited to 'arch/arm/mach-at91/Makefile')
| -rw-r--r-- | arch/arm/mach-at91/Makefile | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile index e8e961bb5f33..705e1fbded39 100644 --- a/arch/arm/mach-at91/Makefile +++ b/arch/arm/mach-at91/Makefile @@ -9,6 +9,7 @@ obj- := obj-$(CONFIG_AT91_PMC_UNIT) += clock.o obj-$(CONFIG_AT91_SAM9_ALT_RESET) += at91sam9_alt_reset.o +obj-$(CONFIG_AT91_SAM9G45_RESET) += at91sam9g45_reset.o # CPU-specific support obj-$(CONFIG_ARCH_AT91RM9200) += at91rm9200.o at91rm9200_time.o at91rm9200_devices.o |