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authorCatalin Marinas <catalin.marinas@arm.com>2009-05-30 14:00:16 +0100
committerCatalin Marinas <catalin.marinas@arm.com>2009-05-30 14:00:16 +0100
commit23d1c515d8fc6d74bea442a4b687c3b5b8627ec4 (patch)
treed257dedacef94e47006d7daca00e698296e9fa38 /arch/arm/kernel/vmlinux.lds.S
parent213fb2a8ee81ec106b9b370a07ccad575e9d3748 (diff)
downloadlwn-23d1c515d8fc6d74bea442a4b687c3b5b8627ec4.tar.gz
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ARMv7: Document the PRRR and NMRR registers setting
This patch adds a comment to the proc-v7.S file for the setting of the PRRR and NMRR registers. It also sets the PRRR[13:12] bits to 0 (corresponding to the reserved TEX[0]CB encoding 110) to be consistent with the documentation. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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