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authorWill Deacon <will.deacon@arm.com>2010-11-24 17:45:49 +0000
committerWill Deacon <will.deacon@arm.com>2010-12-06 11:55:56 +0000
commit7d99331e4793b52d488e911876ef11d843c6c8c9 (patch)
tree0b9d7e659ed21a56c166303772043afcdf9da61a /arch/arm/kernel/hw_breakpoint.c
parentac88e07122fc0eb5cbad403be97ef02c317a06b7 (diff)
downloadlwn-7d99331e4793b52d488e911876ef11d843c6c8c9.tar.gz
lwn-7d99331e4793b52d488e911876ef11d843c6c8c9.zip
ARM: hw_breakpoint: reset control registers in hotplug path
The ARMv7 debug architecture doesn't make any guarantees about the contents of debug control registers following a debug logic reset. This patch ensures that we reset the control registers when a cpu comes ONLINE (for example, with hotplug) so that when we enable monitor mode while inserting a breakpoint we won't exhibit random behaviour. Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'arch/arm/kernel/hw_breakpoint.c')
-rw-r--r--arch/arm/kernel/hw_breakpoint.c16
1 files changed, 15 insertions, 1 deletions
diff --git a/arch/arm/kernel/hw_breakpoint.c b/arch/arm/kernel/hw_breakpoint.c
index 793959ec8982..515a3c44c118 100644
--- a/arch/arm/kernel/hw_breakpoint.c
+++ b/arch/arm/kernel/hw_breakpoint.c
@@ -764,7 +764,7 @@ out:
/*
* One-time initialisation.
*/
-static void __init reset_ctrl_regs(void *unused)
+static void reset_ctrl_regs(void *unused)
{
int i;
@@ -799,6 +799,18 @@ static void __init reset_ctrl_regs(void *unused)
}
}
+static int __cpuinit dbg_reset_notify(struct notifier_block *self,
+ unsigned long action, void *cpu)
+{
+ if (action == CPU_ONLINE)
+ smp_call_function_single((int)cpu, reset_ctrl_regs, NULL, 1);
+ return NOTIFY_OK;
+}
+
+static struct notifier_block __cpuinitdata dbg_reset_nb = {
+ .notifier_call = dbg_reset_notify,
+};
+
static int __init arch_hw_breakpoint_init(void)
{
int ret = 0;
@@ -846,6 +858,8 @@ static int __init arch_hw_breakpoint_init(void)
hook_ifault_code(2, hw_breakpoint_pending, SIGTRAP, TRAP_HWBKPT,
"breakpoint debug exception");
+ /* Register hotplug notifier. */
+ register_cpu_notifier(&dbg_reset_nb);
out:
return ret;
}