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authorSrinivas Kandagatla <srinivas.kandagatla@linaro.org>2014-05-16 20:18:53 +0100
committerKumar Gala <galak@codeaurora.org>2014-09-11 12:07:40 -0500
commitedb81ca3bf586ad526ee67b245cb87f7c7142a87 (patch)
treeded0d2b4eaf21543853e3b116d04fe93bfc1d897 /arch/arm/boot/dts
parent045644ffe618f140791643aa8b78ad2587e8de0f (diff)
downloadlwn-edb81ca3bf586ad526ee67b245cb87f7c7142a87.tar.gz
lwn-edb81ca3bf586ad526ee67b245cb87f7c7142a87.zip
ARM: DT: QCOM: apq8064: Add dma support for sdcc node
This patch adds dma support in both sdcc1 and sdcc3 device node. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Kumar Gala <galak@codeaurora.org>
Diffstat (limited to 'arch/arm/boot/dts')
-rw-r--r--arch/arm/boot/dts/qcom-apq8064.dtsi24
1 files changed, 24 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi
index 32075e84872e..b1e476ac5edf 100644
--- a/arch/arm/boot/dts/qcom-apq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
@@ -206,6 +206,26 @@
regulator-always-on;
};
+ sdcc1bam:dma@12402000{
+ compatible = "qcom,bam-v1.3.0";
+ reg = <0x12402000 0x8000>;
+ interrupts = <0 98 0>;
+ clocks = <&gcc SDC1_H_CLK>;
+ clock-names = "bam_clk";
+ #dma-cells = <1>;
+ qcom,ee = <0>;
+ };
+
+ sdcc3bam:dma@12182000{
+ compatible = "qcom,bam-v1.3.0";
+ reg = <0x12182000 0x8000>;
+ interrupts = <0 96 0>;
+ clocks = <&gcc SDC3_H_CLK>;
+ clock-names = "bam_clk";
+ #dma-cells = <1>;
+ qcom,ee = <0>;
+ };
+
amba {
compatible = "arm,amba-bus";
#address-cells = <1>;
@@ -226,6 +246,8 @@
cap-sd-highspeed;
cap-mmc-highspeed;
vmmc-supply = <&vsdcc_fixed>;
+ dmas = <&sdcc1bam 2>, <&sdcc1bam 1>;
+ dma-names = "tx", "rx";
};
sdcc3: sdcc@12180000 {
@@ -243,6 +265,8 @@
max-frequency = <192000000>;
no-1-8-v;
vmmc-supply = <&vsdcc_fixed>;
+ dmas = <&sdcc3bam 2>, <&sdcc3bam 1>;
+ dma-names = "tx", "rx";
};
};
};