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author | Suman Anna <s-anna@ti.com> | 2017-01-19 09:44:11 -0800 |
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committer | Santosh Shilimkar <ssantosh@kernel.org> | 2017-01-19 09:44:11 -0800 |
commit | 0623013ca629d311be2114314ddaf220604493d3 (patch) | |
tree | bef5bdcd5f8fa53fff7acaafe750b13932172beb /arch/arm/boot/dts | |
parent | 2ae4dad3523be2779a5844348c8bf84d1c9c1584 (diff) | |
download | lwn-0623013ca629d311be2114314ddaf220604493d3.tar.gz lwn-0623013ca629d311be2114314ddaf220604493d3.zip |
ARM: dts: keystone-k2e: Add PSC reset controller node
The Power Sleep Controller (PSC) module contains specific
memory-mapped registers that can be used to perform reset
management using specific bits for the DSPs available on the
SoC. The PSC is defined using a syscon node, and the reset
functionality is defined using a child syscon reset controller
node.
Add this syscon reset controller node as well as the reset
control data for the resets it supports for the 66AK2E SoCs.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
Diffstat (limited to 'arch/arm/boot/dts')
-rw-r--r-- | arch/arm/boot/dts/keystone-k2e.dtsi | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/keystone-k2e.dtsi b/arch/arm/boot/dts/keystone-k2e.dtsi index 9d1d8a64d10e..0dd4cdd6d40c 100644 --- a/arch/arm/boot/dts/keystone-k2e.dtsi +++ b/arch/arm/boot/dts/keystone-k2e.dtsi @@ -8,6 +8,8 @@ * published by the Free Software Foundation. */ +#include <dt-bindings/reset/ti-syscon.h> + / { compatible = "ti,k2e", "ti,keystone"; model = "Texas Instruments Keystone 2 Edison SoC"; @@ -94,6 +96,17 @@ }; }; + psc: power-sleep-controller@02350000 { + pscrst: reset-controller { + compatible = "ti,k2e-pscrst", "ti,syscon-reset"; + #reset-cells = <1>; + + ti,reset-bits = < + 0xa3c 8 0xa3c 8 0x83c 8 (ASSERT_CLEAR | DEASSERT_SET | STATUS_CLEAR) /* 0: dsp0 */ + >; + }; + }; + dspgpio0: keystone_dsp_gpio@02620240 { compatible = "ti,keystone-dsp-gpio"; gpio-controller; |