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| author | Peter Crosthwaite <crosthwaitepeter@gmail.com> | 2014-12-01 10:25:49 +1000 |
|---|---|---|
| committer | Michal Simek <michal.simek@xilinx.com> | 2014-12-01 09:22:50 +0100 |
| commit | 8c7634c0ee4e2b62a361cc0285418e201d162f37 (patch) | |
| tree | 32c12892e63dc8d908fca8247e3dabff103a4dec /arch/arm/boot/dts/zynq-zc702.dts | |
| parent | d86e3104e8066a5412ad3f9790592477a947a77e (diff) | |
| download | lwn-8c7634c0ee4e2b62a361cc0285418e201d162f37.tar.gz lwn-8c7634c0ee4e2b62a361cc0285418e201d162f37.zip | |
arm: dts: zynq: Move crystal freq. to board level
The fact that all supported boards use the same 33MHz crystal is a
co-incidence. The Zynq PS support a range of crystal freqs so the
hardcoded setting should be removed from the dtsi. Re-implement it
on the board level.
This prepares support for Zynq boards with different crystal
frequencies (e.g. the Digilent ZYBO).
Acked-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'arch/arm/boot/dts/zynq-zc702.dts')
| -rw-r--r-- | arch/arm/boot/dts/zynq-zc702.dts | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/zynq-zc702.dts b/arch/arm/boot/dts/zynq-zc702.dts index 94e2cda6f9b6..280f02dd4ddc 100644 --- a/arch/arm/boot/dts/zynq-zc702.dts +++ b/arch/arm/boot/dts/zynq-zc702.dts @@ -42,6 +42,10 @@ status = "okay"; }; +&clkc { + ps-clk-frequency = <33333333>; +}; + &gem0 { status = "okay"; phy-mode = "rgmii-id"; |