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| author | Masahiro Yamada <yamada.masahiro@socionext.com> | 2015-08-04 20:21:02 +0900 |
|---|---|---|
| committer | Olof Johansson <olof@lixom.net> | 2015-08-11 15:09:21 +0200 |
| commit | 68f46897ea7efbcb30d19304072074fac4569c54 (patch) | |
| tree | 407569de9d7cf01bbd56c41caccd6db07d7d59b3 /arch/arm/boot/dts/uniphier-ph1-sld3.dtsi | |
| parent | b9efb8e30e99fe8ca9f886e0332eb0f29b6b48bb (diff) | |
| download | lwn-68f46897ea7efbcb30d19304072074fac4569c54.tar.gz lwn-68f46897ea7efbcb30d19304072074fac4569c54.zip | |
ARM: dts: uniphier: add I2C controller device nodes
Add I2C controller device nodes for PH1-sLD3, PH1-LD4, PH1-sLD8
(FIFO-less I2C) and PH1-Pro4 (FIFO-builtin I2C).
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm/boot/dts/uniphier-ph1-sld3.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/uniphier-ph1-sld3.dtsi | 61 |
1 files changed, 61 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/uniphier-ph1-sld3.dtsi b/arch/arm/boot/dts/uniphier-ph1-sld3.dtsi index db74457232c5..3cc90cd37a26 100644 --- a/arch/arm/boot/dts/uniphier-ph1-sld3.dtsi +++ b/arch/arm/boot/dts/uniphier-ph1-sld3.dtsi @@ -77,6 +77,12 @@ compatible = "fixed-clock"; clock-frequency = <36864000>; }; + + iobus_clk: iobus_clk { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <100000000>; + }; }; soc { @@ -141,6 +147,61 @@ fifo-size = <64>; }; + i2c0: i2c@58400000 { + compatible = "socionext,uniphier-i2c"; + status = "disabled"; + reg = <0x58400000 0x40>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <0 41 1>; + clocks = <&iobus_clk>; + clock-frequency = <100000>; + }; + + i2c1: i2c@58480000 { + compatible = "socionext,uniphier-i2c"; + status = "disabled"; + reg = <0x58480000 0x40>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <0 42 1>; + clocks = <&iobus_clk>; + clock-frequency = <100000>; + }; + + i2c2: i2c@58500000 { + compatible = "socionext,uniphier-i2c"; + status = "disabled"; + reg = <0x58500000 0x40>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <0 43 1>; + clocks = <&iobus_clk>; + clock-frequency = <100000>; + }; + + i2c3: i2c@58580000 { + compatible = "socionext,uniphier-i2c"; + status = "disabled"; + reg = <0x58580000 0x40>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <0 44 1>; + clocks = <&iobus_clk>; + clock-frequency = <100000>; + }; + + /* chip-internal connection for DMD */ + i2c4: i2c@58600000 { + compatible = "socionext,uniphier-i2c"; + reg = <0x58600000 0x40>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <0 45 1>; + clocks = <&iobus_clk>; + clock-frequency = <400000>; + }; + system-bus-controller-misc@59800000 { compatible = "socionext,uniphier-system-bus-controller-misc", "syscon"; |