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| author | Masahiro Yamada <yamada.masahiro@socionext.com> | 2015-07-10 13:53:59 +0900 |
|---|---|---|
| committer | Olof Johansson <olof@lixom.net> | 2015-07-14 11:21:43 +0200 |
| commit | 1bf42507028a85b57260d00be2c33f5012bd3210 (patch) | |
| tree | 7e60f5a92c97a09f03a48c20afb0a130944c2df9 /arch/arm/boot/dts/uniphier-ph1-sld3.dtsi | |
| parent | 475c3eeff57f22443c36c5ab9dc185f064b1f288 (diff) | |
| download | lwn-1bf42507028a85b57260d00be2c33f5012bd3210.tar.gz lwn-1bf42507028a85b57260d00be2c33f5012bd3210.zip | |
ARM: dts: UniPhier: add on-chip UART device nodes
The UniPhier on-chip UART driver was merged into the mainline by
commit 1a8d2903cb6a ("serial: 8250_uniphier: add UniPhier serial
driver").
Add device nodes to make it really available.
We no longer have to depend on the on-board UART device (16550A),
so let's change the chosen and aliases to point to the on-chip ones.
Also, turn on the on-board Ethernet device.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm/boot/dts/uniphier-ph1-sld3.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/uniphier-ph1-sld3.dtsi | 33 |
1 files changed, 33 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/uniphier-ph1-sld3.dtsi b/arch/arm/boot/dts/uniphier-ph1-sld3.dtsi index 248b1886834f..feb253b90fb9 100644 --- a/arch/arm/boot/dts/uniphier-ph1-sld3.dtsi +++ b/arch/arm/boot/dts/uniphier-ph1-sld3.dtsi @@ -71,6 +71,12 @@ compatible = "fixed-clock"; clock-frequency = <50000000>; }; + + uart_clk: uart_clk { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <36864000>; + }; }; soc { @@ -108,6 +114,33 @@ <0x20000100 0x100>; }; + serial0: serial@54006800 { + compatible = "socionext,uniphier-uart"; + status = "disabled"; + reg = <0x54006800 0x40>; + interrupts = <0 33 4>; + clocks = <&uart_clk>; + fifo-size = <64>; + }; + + serial1: serial@54006900 { + compatible = "socionext,uniphier-uart"; + status = "disabled"; + reg = <0x54006900 0x40>; + interrupts = <0 35 4>; + clocks = <&uart_clk>; + fifo-size = <64>; + }; + + serial2: serial@54006a00 { + compatible = "socionext,uniphier-uart"; + status = "disabled"; + reg = <0x54006a00 0x40>; + interrupts = <0 37 4>; + clocks = <&uart_clk>; + fifo-size = <64>; + }; + system-bus-controller-misc@59800000 { compatible = "socionext,uniphier-system-bus-controller-misc", "syscon"; |