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author | Stephen Warren <swarren@nvidia.com> | 2012-09-19 12:13:16 -0600 |
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committer | Stephen Warren <swarren@nvidia.com> | 2012-11-16 12:22:16 -0700 |
commit | 380e04ac2cd96a4c36ad164fce556427dcd2ea0f (patch) | |
tree | 3bb58537b6d280f89119089f68d9890042db9a63 /arch/arm/boot/dts/tegra30.dtsi | |
parent | 2f2b7fb202a2fa93702a79d36033e5c8bee0120d (diff) | |
download | lwn-380e04ac2cd96a4c36ad164fce556427dcd2ea0f.tar.gz lwn-380e04ac2cd96a4c36ad164fce556427dcd2ea0f.zip |
ARM: tegra: define DT bindings for and instantiate RTC
The Tegra RTC maintains seconds and milliseconds counters, and five alarm
registers. The alarms and other interrupts may wake the system from
low-power state.
Define a DT binding for this HW module, and add the module into the Tegra
device tree files.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Diffstat (limited to 'arch/arm/boot/dts/tegra30.dtsi')
-rw-r--r-- | arch/arm/boot/dts/tegra30.dtsi | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi index 48a8320ebf03..f7af06621cc8 100644 --- a/arch/arm/boot/dts/tegra30.dtsi +++ b/arch/arm/boot/dts/tegra30.dtsi @@ -230,6 +230,12 @@ #pwm-cells = <2>; }; + rtc { + compatible = "nvidia,tegra30-rtc", "nvidia,tegra20-rtc"; + reg = <0x7000e000 0x100>; + interrupts = <0 2 0x04>; + }; + i2c@7000c000 { compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c"; reg = <0x7000c000 0x100>; |