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| author | Kyle Huey <me@kylehuey.com> | 2015-07-13 10:35:45 -0700 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2015-08-21 18:44:27 +0200 |
| commit | 82fe42f5d7b01848a6fc2aee150a4050ca56b1e0 (patch) | |
| tree | ed28b550a2b45a2fad141c453b1096a94ae483f4 /arch/arm/boot/dts/tegra124.dtsi | |
| parent | 21fa196fc0f4b79abb923042cb89651ca47b4b92 (diff) | |
| download | lwn-82fe42f5d7b01848a6fc2aee150a4050ca56b1e0.tar.gz lwn-82fe42f5d7b01848a6fc2aee150a4050ca56b1e0.zip | |
ARM: tegra: Add Tegra124 PMU support
This patch modifies the device tree for Tegra124 based devices to enable
the Cortex A15 PMU. The interrupt numbers are taken from NVIDIA Tegra K1
TRM (DP-06905-001_v03p). This patch was tested on a Jetson TK1.
Signed-off-by: Kyle Huey <khuey@kylehuey.com>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'arch/arm/boot/dts/tegra124.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/tegra124.dtsi | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/tegra124.dtsi b/arch/arm/boot/dts/tegra124.dtsi index f72a7529fc03..a3df6737649b 100644 --- a/arch/arm/boot/dts/tegra124.dtsi +++ b/arch/arm/boot/dts/tegra124.dtsi @@ -980,6 +980,18 @@ }; }; + pmu { + compatible = "arm,cortex-a15-pmu"; + interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>; + interrupt-affinity = <&{/cpus/cpu@0}>, + <&{/cpus/cpu@1}>, + <&{/cpus/cpu@2}>, + <&{/cpus/cpu@3}>; + }; + thermal-zones { cpu { polling-delay-passive = <1000>; |