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authorThierry Reding <thierry.reding@gmail.com>2013-12-13 17:25:04 +0100
committerStephen Warren <swarren@nvidia.com>2013-12-16 14:09:22 -0700
commitf5cb19b496300e6b4f8e4da119cc4bf959ab1baa (patch)
treec9473495a73d4632867df0aa122ccf4a7eee351d /arch/arm/boot/dts/tegra124-venice2.dts
parent4ffb93857656a988ceb79473390a7cb1afd01d35 (diff)
downloadlwn-f5cb19b496300e6b4f8e4da119cc4bf959ab1baa.tar.gz
lwn-f5cb19b496300e6b4f8e4da119cc4bf959ab1baa.zip
ARM: tegra: Fix misconfiguration of pin PH2 on Venice2
This pin needs to be configured in pull-down, non-tristate mode in order for the backlight to work correctly. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
Diffstat (limited to 'arch/arm/boot/dts/tegra124-venice2.dts')
-rw-r--r--arch/arm/boot/dts/tegra124-venice2.dts7
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/tegra124-venice2.dts b/arch/arm/boot/dts/tegra124-venice2.dts
index b31e18798be7..d6bb25c78c62 100644
--- a/arch/arm/boot/dts/tegra124-venice2.dts
+++ b/arch/arm/boot/dts/tegra124-venice2.dts
@@ -111,6 +111,13 @@
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
};
+ ph2 {
+ nvidia,pins = "ph2";
+ nvidia,function = "gmi";
+ nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
sdmmc1_clk_pz0 {
nvidia,pins = "sdmmc1_clk_pz0",
"sdmmc1_cmd_pz1",