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| author | Sowjanya Komatineni <skomatineni@nvidia.com> | 2020-01-13 23:24:20 -0800 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2020-03-13 11:25:44 +0100 |
| commit | bdb2c52a6e564af02b467862097b77941699c698 (patch) | |
| tree | fc76ef585f1ced579b5861ad912363626f1f4ca4 /arch/arm/boot/dts/tegra124-venice2.dts | |
| parent | 86614b5d6d9868c868fe78ef2df5474d9b729d5c (diff) | |
| download | lwn-bdb2c52a6e564af02b467862097b77941699c698.tar.gz lwn-bdb2c52a6e564af02b467862097b77941699c698.zip | |
ARM: tegra: Update sound node clocks in device tree
clk_out_1, clk_out_2, and clk_out_3 are part of Tegra PMC block but were
previously erroneously provided by the clock and reset controller.
clk_out_1 is dedicated for audio mclk on Tegra30 through Tegra210.
This patch updates device tree sound node to use clk_out_1 from the PMC
provider as mclk and uses assigned-clock properties to specify clock
parents for clk_out_1 and extern1.
Tested-by: Dmitry Osipenko <digetx@gmail.com>
Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'arch/arm/boot/dts/tegra124-venice2.dts')
| -rw-r--r-- | arch/arm/boot/dts/tegra124-venice2.dts | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/tegra124-venice2.dts b/arch/arm/boot/dts/tegra124-venice2.dts index 7309393bfced..8c2ee6e7d6f1 100644 --- a/arch/arm/boot/dts/tegra124-venice2.dts +++ b/arch/arm/boot/dts/tegra124-venice2.dts @@ -1266,8 +1266,14 @@ clocks = <&tegra_car TEGRA124_CLK_PLL_A>, <&tegra_car TEGRA124_CLK_PLL_A_OUT0>, - <&tegra_car TEGRA124_CLK_EXTERN1>; + <&tegra_pmc TEGRA_PMC_CLK_OUT_1>; clock-names = "pll_a", "pll_a_out0", "mclk"; + + assigned-clocks = <&tegra_car TEGRA124_CLK_EXTERN1>, + <&tegra_pmc TEGRA_PMC_CLK_OUT_1>; + + assigned-clock-parents = <&tegra_car TEGRA124_CLK_PLL_A_OUT0>, + <&tegra_car TEGRA124_CLK_EXTERN1>; }; }; |