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authorLaxman Dewangan <ldewangan@nvidia.com>2013-03-21 19:17:40 +0530
committerStephen Warren <swarren@nvidia.com>2013-04-04 17:17:42 -0600
commitda204ee29fccbb0cd17d07ddd227b9cec04829bc (patch)
tree2ced7093a43b18f8f60d2fccda21fb56700786fd /arch/arm/boot/dts/tegra114-dalmore.dts
parent33eb271ed322a289fa382c1f47021183357ebeff (diff)
downloadlwn-da204ee29fccbb0cd17d07ddd227b9cec04829bc.tar.gz
lwn-da204ee29fccbb0cd17d07ddd227b9cec04829bc.zip
ARM: tegra: dalmore: add cpu regulator node
Dalmore uses the TPS51632 as CPU regulator. The device is connected on I2C5. Add DT node for TPS51632. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
Diffstat (limited to 'arch/arm/boot/dts/tegra114-dalmore.dts')
-rw-r--r--arch/arm/boot/dts/tegra114-dalmore.dts15
1 files changed, 15 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/tegra114-dalmore.dts b/arch/arm/boot/dts/tegra114-dalmore.dts
index b4b3b8e21a9f..1060cbc43132 100644
--- a/arch/arm/boot/dts/tegra114-dalmore.dts
+++ b/arch/arm/boot/dts/tegra114-dalmore.dts
@@ -730,6 +730,21 @@
};
};
+ i2c@7000d000 {
+ status = "okay";
+ clock-frequency = <400000>;
+
+ tps51632 {
+ compatible = "ti,tps51632";
+ reg = <0x43>;
+ regulator-name = "vdd-cpu";
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <1520000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+ };
+
pmc {
nvidia,invert-interrupt;
};