diff options
| author | Stephen Warren <swarren@nvidia.com> | 2012-05-11 16:11:38 -0600 |
|---|---|---|
| committer | Stephen Warren <swarren@nvidia.com> | 2012-05-14 10:54:55 -0600 |
| commit | 95decf84742d712a5875bb655cd7440f6d7c1184 (patch) | |
| tree | 8e08897a8b279cb40b4f4679651bd8f1871a0942 /arch/arm/boot/dts/tegra-seaboard.dts | |
| parent | 1dfebb426cfd16e2080f8c95e00ca2462f2325d4 (diff) | |
| download | lwn-95decf84742d712a5875bb655cd7440f6d7c1184.tar.gz lwn-95decf84742d712a5875bb655cd7440f6d7c1184.zip | |
ARM: dt: tegra: whitespace cleanup
Consistently don't place a space after < or before >.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm/boot/dts/tegra-seaboard.dts')
| -rw-r--r-- | arch/arm/boot/dts/tegra-seaboard.dts | 26 |
1 files changed, 13 insertions, 13 deletions
diff --git a/arch/arm/boot/dts/tegra-seaboard.dts b/arch/arm/boot/dts/tegra-seaboard.dts index c4d171ec9ee4..d4cbd8054c07 100644 --- a/arch/arm/boot/dts/tegra-seaboard.dts +++ b/arch/arm/boot/dts/tegra-seaboard.dts @@ -8,7 +8,7 @@ memory { device_type = "memory"; - reg = < 0x00000000 0x40000000 >; + reg = <0x00000000 0x40000000>; }; pinmux@70000000 { @@ -265,14 +265,14 @@ compatible = "wlf,wm8903"; reg = <0x1a>; interrupt-parent = <&gpio>; - interrupts = < 187 0x04 >; + interrupts = <187 0x04>; gpio-controller; #gpio-cells = <2>; micdet-cfg = <0>; micdet-delay = <100>; - gpio-cfg = < 0xffffffff 0xffffffff 0 0xffffffff 0xffffffff >; + gpio-cfg = <0xffffffff 0xffffffff 0 0xffffffff 0xffffffff>; }; /* ALS and proximity sensor */ @@ -280,7 +280,7 @@ compatible = "isil,isl29018"; reg = <0x44>; interrupt-parent = <&gpio>; - interrupts = < 202 0x04 >; /* GPIO PZ2 */ + interrupts = <202 0x04>; /* GPIO PZ2 */ }; gyrometer@68 { @@ -361,7 +361,7 @@ }; serial@70006300 { - clock-frequency = < 216000000 >; + clock-frequency = <216000000>; }; serial@70006400 { @@ -413,10 +413,10 @@ emc@7000f400 { emc-table@190000 { - reg = < 190000 >; + reg = <190000>; compatible = "nvidia,tegra20-emc-table"; - clock-frequency = < 190000 >; - nvidia,emc-registers = < 0x0000000c 0x00000026 + clock-frequency = <190000>; + nvidia,emc-registers = <0x0000000c 0x00000026 0x00000009 0x00000003 0x00000004 0x00000004 0x00000002 0x0000000c 0x00000003 0x00000003 0x00000002 0x00000001 0x00000004 0x00000005 @@ -427,14 +427,14 @@ 0x00000002 0x00000000 0x00000000 0x00000002 0x00000000 0x00000000 0x00000083 0xa06204ae 0x007dc010 0x00000000 0x00000000 0x00000000 - 0x00000000 0x00000000 0x00000000 0x00000000 >; + 0x00000000 0x00000000 0x00000000 0x00000000>; }; emc-table@380000 { - reg = < 380000 >; + reg = <380000>; compatible = "nvidia,tegra20-emc-table"; - clock-frequency = < 380000 >; - nvidia,emc-registers = < 0x00000017 0x0000004b + clock-frequency = <380000>; + nvidia,emc-registers = <0x00000017 0x0000004b 0x00000012 0x00000006 0x00000004 0x00000005 0x00000003 0x0000000c 0x00000006 0x00000006 0x00000003 0x00000001 0x00000004 0x00000005 @@ -445,7 +445,7 @@ 0x00000002 0x00000000 0x00000000 0x00000002 0x00000000 0x00000000 0x00000083 0xe044048b 0x007d8010 0x00000000 0x00000000 0x00000000 - 0x00000000 0x00000000 0x00000000 0x00000000 >; + 0x00000000 0x00000000 0x00000000 0x00000000>; }; }; |