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author | Marcus Cooper <codekipper@gmail.com> | 2015-05-02 13:36:20 +0200 |
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committer | Maxime Ripard <maxime.ripard@free-electrons.com> | 2015-05-02 13:52:55 +0200 |
commit | 469a22e6bad725cbd3188f37f2d119c7c7eaf510 (patch) | |
tree | 38bc477dd9beb265ef6927dfef38ecfeaeb88dd9 /arch/arm/boot/dts/sun7i-a20-orangepi.dts | |
parent | 94a3e0c4559d22acf05495dc1c4f82d26d5f07d1 (diff) | |
download | lwn-469a22e6bad725cbd3188f37f2d119c7c7eaf510.tar.gz lwn-469a22e6bad725cbd3188f37f2d119c7c7eaf510.zip |
ARM: sunxi: dts: split IR pins for A10 and A20
Currently none of the target boards nor the driver supports
IR TX. However this pin is used in a few instances as a GPIO.
Split the pin ctrl descriptions so that only the IR RX is
configured to be used.
Signed-off-by: Marcus Cooper <codekipper@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Diffstat (limited to 'arch/arm/boot/dts/sun7i-a20-orangepi.dts')
-rw-r--r-- | arch/arm/boot/dts/sun7i-a20-orangepi.dts | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/sun7i-a20-orangepi.dts b/arch/arm/boot/dts/sun7i-a20-orangepi.dts index 7e6405c5448f..b282dda6f6aa 100644 --- a/arch/arm/boot/dts/sun7i-a20-orangepi.dts +++ b/arch/arm/boot/dts/sun7i-a20-orangepi.dts @@ -132,7 +132,7 @@ &ir0 { pinctrl-names = "default"; - pinctrl-0 = <&ir0_pins_a>; + pinctrl-0 = <&ir0_rx_pins_a>; status = "okay"; }; |