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author | Alexandre Torgue <alexandre.torgue@st.com> | 2019-11-19 10:06:57 +0100 |
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committer | Alexandre Torgue <alexandre.torgue@st.com> | 2019-12-09 09:19:15 +0100 |
commit | 95e395c881b35101578f8a7e1041cebcf21d7d79 (patch) | |
tree | 5602d609e4a20f6b4a176b241eac4a231fa944c5 /arch/arm/boot/dts/stm32mp157.dtsi | |
parent | 48c7181fa79fbaf6019087a590092b014bc567aa (diff) | |
download | lwn-95e395c881b35101578f8a7e1041cebcf21d7d79.tar.gz lwn-95e395c881b35101578f8a7e1041cebcf21d7d79.zip |
ARM: dts: stm32: Introduce new STM32MP15 SOCs: STM32MP151 and STM32MP153
STM32MP151 and STM32MP153 were not explicitly supported through
stm32mp157c.dts. This commit adds dedicated files to support all STM32MP15
SOCs family.
The differences between those SOCs are:
-STM32MP151 [1]: common file.
-STM32MP153 [2]: STM32MP151 + CANs + a second CortexA7-CPU.
-STM32MP157 [3]: STM32MP153 + DSI + GPU.
[1] https://www.st.com/resource/en/reference_manual/dm00366349.pdf
[2] https://www.st.com/resource/en/reference_manual/dm00366355.pdf
[3] https://www.st.com/resource/en/reference_manual/dm00327659.pdf
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Diffstat (limited to 'arch/arm/boot/dts/stm32mp157.dtsi')
-rw-r--r-- | arch/arm/boot/dts/stm32mp157.dtsi | 31 |
1 files changed, 31 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/stm32mp157.dtsi b/arch/arm/boot/dts/stm32mp157.dtsi new file mode 100644 index 000000000000..3f0a4a91cce6 --- /dev/null +++ b/arch/arm/boot/dts/stm32mp157.dtsi @@ -0,0 +1,31 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) +/* + * Copyright (C) STMicroelectronics 2019 - All Rights Reserved + * Author: Alexandre Torgue <alexandre.torgue@st.com> for STMicroelectronics. + */ + +#include "stm32mp153.dtsi" + +/ { + soc { + gpu: gpu@59000000 { + compatible = "vivante,gc"; + reg = <0x59000000 0x800>; + interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&rcc GPU>, <&rcc GPU_K>; + clock-names = "bus" ,"core"; + resets = <&rcc GPU_R>; + status = "disabled"; + }; + + dsi: dsi@5a000000 { + compatible = "st,stm32-dsi"; + reg = <0x5a000000 0x800>; + clocks = <&rcc DSI_K>, <&clk_hse>, <&rcc DSI_PX>; + clock-names = "pclk", "ref", "px_clk"; + resets = <&rcc DSI_R>; + reset-names = "apb"; + status = "disabled"; + }; + }; +}; |